Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2005-08-02
2005-08-02
Le, Thong Q. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Signals
C365S207000, C365S233100
Reexamination Certificate
active
06925017
ABSTRACT:
A column select line YS1can be enabled at the same time as the enabling of a word line. Write data is written from an I/O gate into a selected data line. An adjacent unselected sense amplifier reads data from memory cells. A source node of a cross-coupled sense amplifier connected to each data line pair is divided for each column select line, thereby to prevent a write-selected cross-coupled amplifier from driving the source node. In the write operation, data can be written at a high speed. On the other hand, it becomes possible to prevent a write-sense amplifier from driving the source node. Therefore, adjacent sense amplifiers can achieve stable read operation without being affected from the write-sense amplifier.
REFERENCES:
patent: 2002/0093864 (2002-07-01), Ooishi
patent: 2003/0002315 (2003-01-01), Ooishi
patent: 2001-256782 (2001-09-01), None
“WP 24.1 An 8ns Random Cycle Embedded RAM Macro with Dual-Port Interleaved DRAM Architecture (D2RAM)”, 2000 IEEE International Solid-State Circuits Conference, 07803-5853-Aug. 2000.
Kajigaya Kazuhiko
Miyatake Shin-ichi
Noda Hiromasa
Sakata Takeshi
Sekiguchi Tomonori
Elpida Memory Inc.
Hitachi , Ltd.
Hitachi ULSI Systems Co. Ltd.
Le Thong Q.
Mattingly ,Stanger ,Malur & Brundidge, P.C.
LandOfFree
Semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3477315