Semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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Details

C257S068000, C257S071000, C257S298000, C257S301000, C257S311000, C257S905000, C257S908000

Reexamination Certificate

active

06974987

ABSTRACT:
A memory cell transistor and a trench capacitor are provided in a memory region, and both transistors of CMOS are provided in a logic circuit region. There are provided a bit line contact31and a bit line32extending on an inter-level dielectric30. In a memory cell transistor, a source diffusion layer18is covered with two dielectric sidewalls25aand25bin the memory cell transistor so that no silicide layer is formed on the source diffusion layer18. A plate contact31is provided to pass through the inter-level dielectric30and connect a shield line33to a plate electrode16b. The shield line33is arranged in the same interconnect layer as the bit line32.

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patent: 6075720 (2000-06-01), Leung et al.
patent: 6312982 (2001-11-01), Takato et al.
patent: 6466502 (2002-10-01), Matsumoto
patent: 2002/0196690 (2002-12-01), Matsumoto
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patent: 2000-339963 (2000-12-01), None
patent: 2002-158295 (2002-05-01), None
patent: WO 00/10171 (2000-02-01), None

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