Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2005-01-18
2005-01-18
Jackson, Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S339000
Reexamination Certificate
active
06844593
ABSTRACT:
A withstand voltage against electrostatic discharge of a high voltage MOS transistor is improved. An N−-type drain layer is not formed under an N+-type drain layer, while a P+-type buried layer is formed in a region under the N+-type drain layer. A PN junction of high impurity concentration is formed between the N+-type drain layer and the P+-type buried layer. In other words, a region having low junction breakdown voltage is formed locally. The surge current flows through the PN junction into the silicon substrate before the N−-type drain layer below a gate electrode is thermally damaged. Hence, the ESD withstand voltage is improved.
REFERENCES:
patent: 5705842 (1998-01-01), Kitamura et al.
patent: 6534829 (2003-03-01), Sogo et al.
Anzai Katsuyoshi
Kikuchi Shuichi
Nishibe Eiji
Uehara Masafumi
Jackson Jerome
Sanyo Electric Co,. Ltd.
LandOfFree
Semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3437610