Semiconductor device

Details Semiconductor device Semiconductor device

2005-03-01

2005-03-01

Le, Thong Q. (Department: 2818)

Static information storage and retrieval

Read/write circuit

Bad bit

C365S210130

Reexamination Certificate

active

06862232

ABSTRACT:
A dummy cell includes a plurality of first memory cells MC for storing “1” or “0”, arranged at points of intersection between a plurality of word lines WR0to WR7and a plurality of first data lines D0to D7, a plurality of first dummy cells MCH for storing “1” or “0”, arranged at points of intersection between the word lines WR0to WR7and a first dummy data line, and a plurality of second dummy cells MCL for storing “0”, arranged at points of intersection between the word lines WR0to WR7and a second dummy data line DD1.

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patent: 6314014 (2001-11-01), Lowrey et al.
patent: 6317376 (2001-11-01), Tran et al.
Scheuerlein, R., et al, “A 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, IEEE International Solid-State Circuits Conference, Digest of Technical Papers, Feb. 8, 2000, pp 128-131.
U.S. patent application publication No. US 2001/0053104, Published Dec. 20, 2001, Tran et al.

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