Semiconductor device

Details Semiconductor device Semiconductor device

2002-05-23

2004-10-12

Cuneo, Kamand (Department: 2827)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

C257S712000, C257S667000, C257S669000

Reexamination Certificate

active

06803258

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device incorporating a lead frame. More particularly, the invention relates to techniques adapted advantageously to a semiconductor device with a lead frame comprising numerous leads as well as heat radiation plates.
LSIs and other semiconductor devices have known ever-higher levels of circuit integration while incorporating higher functions and more complicated circuits than ever before. The enhanced functionality requires furnishing each semiconductor device with a large number of external terminals. This in turns involves increasing the number of pad electrodes provided on a semiconductor chip as well as the number of leads, i.e., external terminals of the semiconductor device. A typical logic semiconductor device may have hundreds of external terminals. Semiconductor devices of the so-called QFP (quad flat package) type, well known as a family of semiconductor devices each having numerous external terminals, are generally mounted on one side of a substrate and called surface-mounted semiconductor devices. The QFP type semiconductor device is suitable for accommodating a large number of leads because each of four sides of the package enclosing the semiconductor chip carry a plurality of leads When mounted on a substrate, this type of semiconductor device permits an effective use of space around it.
A lead frame used in the assembling of such QFP type semiconductors is discussed illustratively in “VLSI Packaging Techniques (Vol. 1)” published by Nikkei BP (in Japan) on May 31, 1993, pp. 155-164. In particular, specific patterns of the frame are shown on pp. 157 and 159.
Fine structures of the semiconductor chip comprise an increasing number of elements each operating at a higher speed than ever. This causes an increase of heat generation from the semiconductor chip. The problem is avoided illustratively by a semiconductor device having a heat spreader, as described in the “VLSI Packaging Techniques” (Vol. 2), pp. 200-203. The semiconductor device has its semiconductor chip furnished with a heat spreader arrangement to promote heat dissipation of the device.
SUMMARY OF THE INVENTION
In accommodating a large number of leads, the lead frame needs to have its lead-to-lead spacing (i.e., lead pitch) narrowed and the width of its leads lessened.
The semiconductor chip also comprises numerous pad electrodes whose presence is necessitated by the enhanced functionality of the semiconductor device. Meanwhile, the spacing between pad electrodes (i.e., pad pitch) has been reduced over the years. Whereas there are different pad pitches for different semiconductor chips in general, the need to obtain as many chips as possible per wafer involves establishing the smallest possible chip size. The trend in turn requires having the smallest possible pitch between pad electrodes.
Given such reduced pad pitches and under restrictions associated therewith, the process of bonding the many leads to the corresponding pad electrodes using wires made of gold or like material tends to trigger an increasing number of short-circuits between adjacent wires.
During resin molding after the wire bonding, a decline in the mechanical strengths of leads or a narrowed wire spacing may let wires be deformed by molding resin fluidity. The deformation called wire flow can result in short-circuited wires.
Furthermore, in a QFP, an area in which to lay out leads becomes narrower the closer it gets to a centrally located semiconductor chip. The thickness and the pitch of the leads are subject to limitations stemming from the limitation of the manufacture precision of the lead. More specifically, lead pitch cannot be made sufficiently fine compared with pad patch on the semiconductor chip. As the semiconductor chip shrinks in external dimensions, it becomes increasingly difficult to bring the tips of the leads close to the chip. When the lead tips to be bonded are distanced from the pad electrodes of the semiconductor chip under such circumstances, wires for bonding the pads to the leads must be extended. Extended wires are likely to cause more short-circuits or result in more wire flow than before.
While today's practical pad pitches are down to about 80 &mgr;m, the required pitch is expected to reach 60 to 45 &mgr;m in the future. As chips shrink further, bonding wires are extended correspondingly. At present, it is necessary to keep the wire length to a maximum of 5 or 6 mm in order to ensure stable bonding. This requires further reducing the pitch of lead tips so as to avert wire extensions.
FIG. 1
shows results of simulations performed by the inventors about wire bonding. On 256-pin semiconductor chips with different pad pitches, correlations were simulated between inner lead tip pitches on the one hand and wire lengths for stable bonding on the other hand. The simulations revealed the need to restrict the lead tip pitch to a maximum of 180 &mgr;m with respect to the 60 &mgr;m pad pitch in order to ensure stable bonding.
Such micro-fabrication of the leads is bound to lower their mechanical strength. Even an extremely limited amount of force can thus deform the tenuous lead formation. The deformed leads trigger short-circuits.
A conventional solution to the above problem is the fastening of inner leads using an insulating tape to prevent lead deformation.
FIG. 2
is a plan view of a conventionally structured tape-fastened lead frame.
FIG. 3
is a cross-sectional view of a resin-sealed semiconductor device fabricated by use of the lead frame in FIG.
2
.
The lead frame is illustratively made of a copper alloy. A semiconductor chip
1
(indicated by broken lines) is fixed to a tab
2
. A plurality of leads
3
are located around the entire periphery of the mounted semiconductor chip
1
. The leads
3
come in two types: inner leads
4
and outer leads
5
. The tips of the inner leads
4
surround the semiconductor chip
1
.
The leads
3
are integrated with a dam bar
6
or with a tie bar
8
constituting a framework of the lead frame. The inner and outer leads
4
and
5
are formed inside and outside of the dam bar
6
respectively. The tab
2
is supported by tab suspending leads
7
furnished across the inner leads
4
. The inner leads
4
and the tab suspending leads
7
are fastened to a rectangular insulating tape
9
.
In the case of a semiconductor device using the above-described lead frame, the semiconductor chip
1
is fixed to the tab
2
by resin or by silver paste while the inner leads
4
are connected to pad electrodes
10
of the chip
1
by bonding wires
11
. After bonding, the semiconductor chip
1
, tab
3
, inner leads
4
and bonding wires
11
are molded by a molding member
12
illustratively made of epoxy resin. The dam bar
6
and tie bar
8
are cut so that the leads
3
are electrically isolated from one another. Thereafter, the outer leads
5
extending from the molding member
12
are illustratively formed in gull wing fashion as shown in FIG.
3
. This completes fabrication of the semiconductor device.
With the tape-fastened lead frame, as shown in
FIGS. 2 and 3
, a middle part of the inner leads
4
is secured by the tape
9
to allow for flexible uses of the frame. In other words, the tape
9
is positioned away from the tips of the inner leads
4
. This is an inefficient and unstable structure for fastening the inner lead tips to which wires are to be bonded.
Furthermore, some recently developed semiconductor devices have been subject to significant heat generation from semiconductor chips because of their enhanced functionality and high performance. These devices have their semiconductor chips equipped with a heat radiation plate such as a heat spreader to facilitate heat dissipation.
FIG. 4
is a plan view of a lead frame for use with a heat spreader-incorporating QFP (called HQFP hereunder), wherein a copper foil devised by the inventors is attached by adhesive to a semiconductor chip as a heat radiation plate. This setup has not been disclosed until now.
FIG. 5
is a cross-sectional view of

Affiliated with

Also associated with

Rating

Semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor device will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3326793