Semiconductor device

Details Semiconductor device Semiconductor device

2003-04-14

2004-08-03

Le, Vu A. (Department: 2824)

Static information storage and retrieval

Systems using particular element

Magnetoresistive

C365S177000, C365S063000, C257S529000

Reexamination Certificate

active

06771535

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device, and, more particularly, to a semiconductor device that includes fast, highly-integrated and highly-reliable memory using memory cells which store information using a change in magnetoresistance.
2. Description of the Prior Art
A magnetoresistive random access memory (MRAM) has been developed as a memory which is not limited to the number of read/write operations while it is a non-volatile memory.
An MRAM stores information by utilizing such a magnetoresistive effect that the resistance of an element varies depending on the direction of magnetization of a ferromagnetic material in a memory cell. Recently, attempts have been made to development magnetic tunnel junction (MTJ) elements which have a greater magnetoresistive ratio called magnetoresistance (MR) than elements of the prior art and to apply the MTJ elements to MRAMs. The attempts have led to a possibility of realizing a memory which performs as fast a read-out operation as a static random access memory (SRAM) and whose integration scale is as large as that of a dynamic random access memory (DRAM).
For example, such memories are described in IEEE International Solid-State Circuits Conference, DIGEST of TECHNICAL PAPERS, pp. 128-129 and pp. 130-131, 2000.
FIG. 2
shows the basic structure of memory cells used in the memories. Each memory cell comprises a single MTJ element MTJ and a single transistor MMC, which are connected to a write word line WW, a read word line WR and a data line DL.
The MTJ element MTJ has such a structure as to have a tunnel insulating film sandwiched between a fixed layer of a ferromagnetic material whose direction of magnetization is fixed in a normal operation and a free layer of a ferromagnetic material whose direction of magnetization can be flipped by a read-out operation. The resistance across the two ends of the MTJ element changes in accordance with the directions of the magnetization of the two ferromagnetic layers. The resistance is low when both directions of the magnetization are the same, whereas the resistance is high when they are opposite to each other.
A read-out operation is executed as illustrated in FIG.
3
. The read word line WR is selected to enable the transistor MMC, a voltage is applied across the ends of the MTJ element MTJ and stored information is read out by detecting a current I
DL
which flows through the data line DL according to the magnetoresistance of the MTJ element MTJ.
A write operation is executed as illustrated in FIG.
4
. Specifically, with a current I
ww
of the selected write word line WW serving as a write word line current I
ws
, the write operation is carried out by letting a write current I
D1
or I
D0
corresponding to write data “1” or “0” flow through the data line DL.
At this time, a magnetoresistive ratio MR or the ratio of an increase in resistance in the high resistance state to that in the low resistance state shows a hysteresis characteristic as shown in FIG.
5
. The hard axis magnetic field that is produced by the write word line current I
ws
makes it easier to flip the magnetization of the MTJ element, thus providing a narrow hysteresis characteristic with respect to the data line current I
DL
that produces an easy axis magnetic field. This makes it possible to write stored information by flipping the magnetization of only the memory cell that is selected by the write word line WW.
To make the practical use of an MRAM using the memory cells as shown in
FIG. 2
, the high S/N ratio is important. As shown in
FIG. 3
, a read signal from a memory cell is the data line current I
DL
according to the invention the magnetoresistance of the MTJ element. As described in the aforementioned documents, the magnetoresistive ratio MR of the MTJ element is as high as several tens of %. Further, as shown in
FIG. 6
, the magnetoresistive ratio MR is highly dependent on the applied voltage. For example, whereas the magnetoresistive ratio MR
0
in the vicinity of the applied voltage of 0 V is 40%, the applied voltage, V
H
, that provides a magnetoresistive ratio of 20%, a half the magnetoresistive ratio MR
0
, is about 0.3 V. Therefore, the difference between signal currents for write data of “0” and “1” has a peak value with respect to the applied voltage and the signal current cannot be increased by increasing the applied voltage.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the invention to provide a semiconductor device which overcomes the conventional problem mentioned above. In other words, the invention aims at providing an MRAM which has a large signal current and a high S/N ratio, and a semiconductor device including such an MRAM.
To achieve the object, a semiconductor device according to the invention comprises a plurality of memory cells; a plurality of word lines for selecting the plurality of memory cells; and a plurality of data lines which are so laid out as to be perpendicular to the plurality of word lines and through which signals are read out from the plurality of memory cells, each of the plurality of memory cells including a magnetoresistive element and a bipolar transistor. That is, in the semiconductor device according to the invention, each memory cell is designed to include a magnetoresistive element and a bipolar transistor, information is stored by the state of the magnetization of the magnetoresistive element and the current which flows across the magnetoresistive element is amplified by the bipolar transistor to be a read current.
It is preferable that each of plural memory cells in the semiconductor device should be constituted by a single magnetoresistive element and a single bipolar transistor.
In the semiconductor device, each of plural memory cells may be constituted by two magnetoresistive elements and two bipolar transistors.
The object of the invention and other objects thereof will become apparent from the detailed description given hereinafter with reference to the accompanying drawings. Throughout the diagrams, same reference symbols indicate same or like components.


REFERENCES:
patent: 6055178 (2000-04-01), Naji
patent: 6462980 (2002-10-01), Schuster-Woldan et al.
patent: 6490217 (2002-12-01), DeBrosse et al.
Roy Scheuerlein, William Gallagher, Stuart Parkin, Alex Lee, Sam Ray, Ray Robertazzi and William Reohr, “a 10ns Read and Write Non-Volatile Memory Array Using a Magnetic Tunnel Junction and FET Switch in each Cell”, 2000 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 128-135.
M. Durlam, P. Naji, M. DeHerrera, S. Tehrani, G. Kerszykowski, K. Kyler “Nonvolatile RAM Based on Magnetic Tunnel Junction Elements”, 2000 IEEE International Solid-State Circuits Conference, Digest of Technical Papers, pp. 136-142.

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