Static information storage and retrieval – Read/write circuit – Differential sensing
Reexamination Certificate
2002-10-03
2004-04-06
Tran, Michael (Department: 2818)
Static information storage and retrieval
Read/write circuit
Differential sensing
C365S222000
Reexamination Certificate
active
06717878
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor memory device which requires a refresh operation as a DRAM.
2. Description of the Related Art
In a semiconductor memory device, for example, a DRAM, a refresh (this is called as self-refresh) operation must be periodically carried out in order to hold data.
FIG. 7
shows a self-refresh periodic control circuit for carrying out the above self-refresh operation. A reference numeral
1
denotes a reference current generating circuit, which is constituted by P-type MOS (hereinafter, referred to as PMOS) transistors P
1
and P
2
, N-type MOS (hereinafter, referred to as NMOS) transistors N
1
and N
2
, and a resistor R
1
. An output of the reference current generating circuit
1
is inputted to a ring oscillator circuit X.
FIG. 8
shows a circuit configuration of the ring oscillator X. The ring oscillator X are provided with odd transistor couples, and an output of the final stage of the transistor couples is fed back to the initial state, and thereby the ring oscillator X is oscillated at a certain period. The period becomes short when a reference current to the ring oscillator X becomes large. The ring oscillator X carries out a self-refresh operation based on the oscillation period. Therefore, a temperature characteristic of the self-refresh period coincides with a temperature characteristic of current outputted by the reference current generating circuit
1
.
Usually, the temperature characteristic of the reference current generating circuit
1
having the above circuit configuration is approximately 1, that is, the reference current generating circuit
1
has almost no temperature characteristic. Therefore, the ring oscillator X has almost no temperature characteristic. As a result, a self-refresh operation is carried out at a predetermined period regardless of an ambient temperature.
By the way, in the DRAM, a data holding capability becomes worse in a high temperature, so that the self-refresh period is set such that it can be optimized in the high temperature. However, in a normal temperature, a refresh holding capability is higher than the case of the high temperature; nevertheless, the self-refresh operation is carried out at the period set in the high temperature. As a result, the self-refresh operation is carried out at the period shorter than DRAM refresh capability; for this reason, in the normal temperature, a problem arises such that the refresh operation has been carried out over the necessity.
SUMMARY OF THE INVENTION
The present invention has been made in order to solve the above problem that the refresh operation is wastefully carried out in a normal temperature, and object of the present invention is to provide a semiconductor device which can make a self-refresh period longer in a normal temperature.
A semiconductor device such as a DRAM is provided with an internal circuit for determining a refresh period. The internal circuit generates a predetermined period on the basis of a reference current supplied thereto. If the reference current is set so as to have a positive temperature characteristic, it is convenient since the refresh period becomes long in a low temperature. However, in this case, a problem arises such that it is impossible to largely vary the temperature characteristic by a small temperature change.
Therefore, a semiconductor device according to a first aspect of the present invention is provided with:
a first reference current generating circuit (
1
) which generates a first reference current having a first temperature characteristic;
a second reference current generating circuit (
2
) which generates a second reference current having a second temperature characteristic; and
a temperature characteristic multiplying circuit (
3
) which multiplies the temperature characteristic of one reference current by using a current difference between the first and second reference currents. Furthermore, an output current of the temperature characteristic circuit is supplied to the internal circuit.
The temperature characteristic multiplying circuit (
3
) includes:
a first P-type MOS transistor (P
5
) which has a gate for receiving the first reference current and which has a source connected to a first power supply;
a first N-type MOS transistor (N
5
) which has a gate for receiving the second reference current, which has a source connected to a second power supply and which has a drain connected to a drain of the first P-type MOS transistor; and
a second P-type MOS transistor (P
6
) which has a source connected to the first power supply and which has a gate and a drain connected to a junction point (drain) between the first P-type MOS transistor and the second N-type MOS transistor. Therefore, a reference current having a multiplied temperature characteristic can be obtained from the junction point.
A semiconductor device according to a second aspect of the present invention is provided with a synthesizing section (
5
) which synthesizes the first or second reference current with an output current of the temperature characteristic multiplying circuit (
3
), in order to prevent the refresh period from becoming too long. By doing so, in the lower temperature, the synthesizing section outputs the first or second reference current.
A semiconductor device according to a third aspect of the present invention is provided with a tuning section (
6
) which controls at least one of the first and second reference currents to a desired value, in order to correct a dispersion of process when manufacturing the device, and an output of the tuning section is supplied to the temperature characteristic multiplying circuit (
3
).
According to a fourth aspect of the present invention, in order to be capable of adjusting the output of the reference current even after completion of the semiconductor device, a fuse blow is connected to each of a plurality of transistor having different sizes, they are connected in parallel to each other, and the fuse blow is selectively disconnected in the tuning section (
6
) according to the third aspect.
According to a fifth aspect of the present invention, in order to obtain a further multiplied temperature characteristic, the temperature characteristic multiplying circuit has a two-stage connecting configuration.
In a case where the internal circuit is an oscillator which supplies a signal into the semiconductor device, the oscillator is used for a refresh operation of a dynamic memory included in the semiconductor device.
REFERENCES:
patent: 6230560 (2001-05-01), Suzuki
Hagura Tsukasa
Tsukude Masaki
McDermott & Will & Emery
Renesas Technology Corp.
Tran Michael
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