Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Patent
1995-08-24
1997-04-01
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
257620, 257690, 257786, H01L 2348
Patent
active
056169310
ABSTRACT:
A semiconductor device has a plurality of chip regions each having semiconductor elements disposed therein and a plurality of electrode pads disposed on a surface thereof. The chip regions are separated and defined by scribing line regions. A plurality of dummy pads are disposed in the scribing line regions for use in positioning the electrode pads upon wafer probe test. The dummy pads are disposed in diagonally opposite positions across each of the chip regions one on each side of the each of the chip regions.
REFERENCES:
Patent Abstracts of Japan, Section E:E-967, vol. 14, No. 387, p. 158.
Patent Abstracts of Japan, Section E:E-982, vol. 13, No. 292, p. 66.
Patent Abstracts of Japan, Section E:E-199, vol. 7, No. 214, p. 14.
Nakamura Toru
Toriyama Keiji
Crane Sara W.
Hardy David B.
NEC Corporation
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