Electricity: conductors and insulators – Boxes and housings – Hermetic sealed envelope type
Reexamination Certificate
2002-01-16
2003-01-28
Reichard, Dean A. (Department: 2831)
Electricity: conductors and insulators
Boxes and housings
Hermetic sealed envelope type
C174S050510, C257S668000, C257S678000, C257S787000
Reexamination Certificate
active
06512176
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a semiconductor device formed of an insulating tape that has an electrically conductive wiring provided to electrically connect a semiconductor chip and external terminals, and particularly to a ball grid array (BGA) type semiconductor device with its external terminals made of spherical solder balls.
A BGA type semiconductor device suitable for multiple pins, small size and high-speed operation has been practically used in order to increase the mounting density of semiconductor devices. The BGA type semiconductor device has solder bumps disposed as its external terminals in a two-dimensional array on the surface of the semiconductor device. In the BGA type semiconductor device, a member called an interposer is also used that has a conductive wiring formed on and/or within its surface in order to electrically connect the semiconductor chip and the external terminals. The interposer is used in a form of a printed wiring board of which the base material is a glass/epoxy resin, or in another form of an insulating tape having a conductive wiring on the surface of a base made of polyimide or the like.
A semiconductor device using the insulating tape with conductive wiring formed is described in “High Connection Reliability Cleared by Structure-Improved CSP”, Nikkei Microdevice, February, 1998, pp. 48-55. In a conventional BGA semiconductor device as illustrated in
FIG. 10
, an insulating tape
2
as an interposer is used that has a conductive wiring
4
, bonding pads
3
, lands
5
and an insulating film
6
. A semiconductor chip
1
has its lower side
1
b
mounted on a semiconductor chip mounting surface
2
a
of the insulating tape
2
with an adhesive member
8
. The bonding pads
3
formed on the semiconductor chip mounting surface
2
a
of the insulating tape
2
are respectively located within openings
12
that are formed in the insulating film
6
. The bonding pads and electrodes formed on the upper surface,
1
a
of the semiconductor chip
1
, though not shown are electrically connected by bonding metal fine wires
7
to those pads and electrodes, respectively. A sealing member, or mold
9
is provided on the chip mounting surface
2
a
side of the insulating tape
2
, sealing the semiconductor chip
1
and the metal fine wires
7
. The external terminals,
10
are provided on the mounted side
2
b
of the insulating tape
2
, and bonded to the lands
5
within openings
11
of tape
2
. The semiconductor chip
1
and external terminals
10
are electrically connected through the metal fine wires
7
, bonding pads
3
, conductive wiring
4
and lands
5
.
SUMMARY OF THE INVENTION
In the conventional semiconductor device shown in
FIG. 10
, the semiconductor chip
1
is made of a material of silicon (Si) of which the linear expansion coefficient is about 2~3×10
−6
/° C. The insulating tape
2
is made of a base material such as polyimide resin or glass/epoxy resin of which the linear expansion coefficient is about 10×10
−6
/° C. The sealing mold
9
is chiefly epoxy resin with silica particles filled, and has a linear expansion coefficient of about 8~14×10
−6
/° C.
The semiconductor device is usually mounted through the external terminals
10
on a printed wiring board or substrate that is made of a base material of a glass/epoxy resin (for example, FR-4) of which the linear expansion coefficient is about 15~16×10
−6
/° C. The linear expansion coefficient of the whole conventional semiconductor device is close to that of the semiconductor chip
1
because the proportion of the semiconductor chip
1
within the whole semiconductor device is large.
When the semiconductor device mounted on the printed wiring board undergoes a temperature cycle test for reliability, or experiences a temperature change, a distortion is caused at the external terminals
10
made of chiefly a solder material (such as Pb—Sn based eutectic solder or Sn—Ag—Cu based solder) due to the linear expansion coefficient difference between the semiconductor device and the printed wiring board.
In the conventional semiconductor device shown in
FIG. 10
, only one side, or the chip mounting side
2
a,
of the insulating tape
2
is sealed with the sealing mold
9
. Therefore, when the temperature is decreased, the semiconductor device is deformed to curve, causing a distortion at the external terminals
10
due to the contraction of the sealing mold
9
. The distortion due to the warp is super-imposed on the distortion that is caused by the linear expansion coefficient difference of the semiconductor device to the printed wiring board, thus further increasing the distortion at the external terminals. When the external terminals
10
are greatly distorted and subjected to repetitive temperature changes, they are cracked and finally broken down.
The distortion due to the above factors becomes the largest at the external terminal
10
a
that is bonded to the land
5
a
close to the edge of the semiconductor chip
1
of which the linear expansion coefficient is the smallest in the semiconductor device. The breakdown will be most probably caused from this portion. Particularly when the land
5
a
close to the edge of the semiconductor chip
1
is disposed to extend across the side edge of the semiconductor chip
1
as shown in
FIG. 10
, a large distortion is caused thereat as will be apparent from the following reason. Although the distortion at such a part of the external terminal
10
a
as located right under the semiconductor chip
1
can be alleviated by the deformation of the adhesive member
8
that is elastic, the other portion over which there is no semiconductor chip
1
is restricted by the sealing agent
9
and thus cannot be freely deformed. Therefore, a large distortion is concentrated at the end of the external terminal
10
a
that is located outside the side edge of the semiconductor chip
1
, causing it to break down with a high probability.
When the linear expansion coefficient of the sealing agent
9
is not so large, the external terminal
10
b
located at the edge of the semiconductor device is sometimes distorted greatly, thus broken down with some probability as is similar to the external terminal
10
a
close to the edge of the semiconductor chip
1
.
Occurrence of breakdown of the external terminal
10
will result in electrical disconnection, and therefore the semiconductor device does not properly operate, thus the reliability of the semiconductor device being remarkably reduced.
Accordingly, it is an object of the invention to provide a semiconductor device of particularly BGA type capable of preventing/suppressing the external terminals from being broken down, or having high reliability.
The above object can be achieved by the semiconductor device having, for example, such structures of (A)~(H) as described below.
(A) A structure having a first insulating member, external terminals provided on a main surface of the first insulating member, a semiconductor chip provided on the opposite side to the side of the first insulating member on which the external terminals are provided, a conductive member for electrically connecting the semiconductor chip and the external terminals, and a sealing member provided on the opposite side to the side of the first insulating member on which the external terminals are provided, wherein a second insulating member is interposed between the semiconductor chip and the first insulating member, and the outer edge of the second insulating member extends from the outer edge of the semiconductor chip.
(B) A structure having a first insulating member, external terminals provided on a main surface of the first insulating member, a semiconductor chip provided on the opposite side to the side of the first insulating member on which the external terminals are provided, a conductive member for electrically connecting the semiconductor chip and the external terminals, and a sealing member provided on the opposite side to the side of the first insulating member
Haruta Ryo
Ichitani Masahiro
Yaguchi Akihiro
Antonelli Terry Stout & Kraus LLP
Hitachi , Ltd.
Oliva Carmelo
Reichard Dean A.
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