Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-08-30
2003-09-16
Fahmy, Wael (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S330000
Reexamination Certificate
active
06621132
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a semiconductor structure applicable to semiconductor devices, such as MOSFET's (metal oxide semiconductor field effect transistors), IGFET's (insulated gate field effect transistors), IGBT's (insulated gate bipolar transistors), bipolar transistors and diodes. More specifically, the present invention relates to a semiconductor structure, that provides a current path in the ON-state of the device and is depleted in the OFF-state of the device to realize a high breakdown voltage and a high current capacity.
BACKGROUND OF THE INVENTION
The semiconductor devices may be classified into a lateral device, that arranges the main electrodes thereof on one major surface and makes a drift current flow parallel to the major surface, and a vertical device, that distributes the main electrodes thereof on two major surfaces facing opposite to each other and makes a drift current flow perpendicular to the major surfaces.
In the vertical semiconductor device, a drift current flows in the thickness direction of the semiconductor chip (vertically) in the ON-state of the semiconductor device and depletion layers expand also in the thickness direction of the semiconductor chip (vertically) in the OFF-state of the semiconductor device. In the conventional vertical planar-type n-channel MOSFET, the very resistive n-type drift layer thereof provides a drift current path in the ON-state of the MOSFET and is depleted in the OFF-state thereof, resulting in a high breakdown voltage.
Thinning the n-type drift layer, that is shortening the drift current path, facilitates substantially reducing the on-resistance, since the drift resistance against the drift current is reduced. However, the thinning the n-type drift layer narrows the width between the drain and the base, for that depletion layers expand from the pn-junctions between p-type base regions and the n-type drift layer. Due to the narrow expansion width of the depletion layers, the depletion electric field strength soon reaches the critical value for silicon. Therefore, breakdown is caused at a voltage lower than the designed breakdown voltage of the device. A high breakdown voltage is obtained by thickening the n-type drift layer. However, the thick n-type drift layer inevitably causes high on-resistance, that further causes loss increase. In other words, there exists a tradeoff relation between the on-resistance and the breakdown voltage.
The tradeoff relation between the on-resistance and the breakdown voltage exists in the other semiconductor devices such as IGBT's, bipolar transistors and diodes. The tradeoff relation exists also in the lateral semiconductor devices, in that the flow direction of the drift current in the ON-state of the device and the expansion direction of the depletion layers expanded by applying a reverse bias voltage in the OFF-state of the device are different from each other.
European Patent 0 053 854, U.S. Pat. No. 5,216,275, U.S. Pat. No. 5,438,215, and Japanese Unexamined Laid Open Patent Application H09-266311 disclose semiconductor devices, which facilitate reducing the tradeoff relation between the on-resistance and the breakdown voltage. The drift layers of the disclosed semiconductor devices are formed of an alternating conductivity type layer including heavily doped n-type regions and heavily doped p-type regions arranged alternately. The alternating conductivity type layer, depleted in the OFF-state, facilitates sustaining a high breakdown voltage.
The drift layers of the disclosed semiconductor devices are not a uniform impurity diffusion layer of one conductivity type but an alternating conductivity type layer formed of n-type drift regions and p-type partition regions arranged alternately. The n-type drift regions and p-type partition regions are extended vertically.
Since the entire drift layer is depleted by the depletion layers expanding laterally from the vertically extending pn-junctions between n-type drift regions and p-type partition regions in the OFF-state of the MOSFET, a high breakdown voltage is obtained even when the impurity concentrations in the n-type drift regions and the p-type partition regions are high.
Japanese Unexamined Laid Open Patent Application No. 2000-40822 discloses the method of manufacturing such a semiconductor device including an alternating conductivity type layer. Hereinafter, the semiconductor device including an alternating conductivity type layer, that provides a current path in the ON-state of the device and is depleted in the OFF-state of the device, will be referred to as the “super-junction semiconductor device”.
Generally, the on-resistance Ron x A) of the planar-type super-junction MOSFET is described by the following formula (1).
Ron×A=
(
Rs+Rch+Racc+RJFET+Rdrift+Rd
)×
A
(1)
Here, Rs is the resistance of the source layer, Rch the channel resistance, Racc the resistance of the accumulation layer, R
JFET
the resistance due to the junction FET (JFET) effect, Rdrift the drift resistance and Rd the resistance of the drain layer.
Since the drift resistance Rdrift is described by the following formula (2) for the super-junction semiconductor device, the drift resistance Rdrift increases only in proportion to the increasing breakdown voltage. Therefore, the super-junction MOSFET facilitates reducing the on-resistance much more drastically than the conventional MOSFET's. The on-resistance is further reduced by reducing the thickness d of the n-type drift regions in the alternating conductivity type layer at the same breakdown voltage.
Rdrift×A=
(4×
d×Vb
)/(&mgr;×∈o ×∈s×Ec
2
) (2)
Here, &mgr; is the electron mobility, ∈o the dielectric permeability of the vacuum, ∈s the relative dielectric permeability of silicon, d the thickness of the n-type drift region, Ec the critical electric field strength, and Vb the breakdown voltage.
As the drift resistance Rdrift is reduced drastically, the other resistance components in the foregoing formula (1) become more influential. Especially, the resistance R
JFET
due to the JFET effect occupies a considerable part of the on-resistance. To obviate this problem, a trench-type MOSFET is proposed. The trench-type MOSFET includes trenches dug from the surface of the semiconductor chip and gate electrodes buried in the respective trenches so that channel may be created in the side wall portions of the trenches.
Although the on-resistance is reduced by aligning the trenches at a repeating pitch, where a pair of an n-type drift region and a p-type partition region is arranged repeatedly, the gate input capacitance and the feedback capacitance are increased, resulting in a low switching speed. The input capacitance increase causes an increase of the driving electric power.
In view of the foregoing, it is an object of the invention to provide a super-junction semiconductor device, that facilitates greatly reducing the tradeoff relation between the breakdown voltage and the on-resistance, preventing the input capacitance and the feedback capacitance from increasing, increasing the switching speed and further reducing the on-resistance.
SUMMARY OF THE INVENTION
According to an embodiment of the invention, there is provided a semiconductor device including: a semiconductor chip having a first major surface and a second major surface facing opposite to the first major surface; a first main electrode on the first major surface; a second main electrode on the second major surface; a layer with low electrical resistance on the side of the second major surface; an alternating conductivity type layer between the first major surface and the layer with low electrical resistance; the alternating conductivity type layer including first semiconductor regions of a first conductivity type and second semiconductor regions of a second conductivity type arranged alternately; a pair of the first semiconductor region and the second semiconductor region bei
Fujihira Tatsuhiko
Iwamoto Susumu
Onishi Yasuhiko
Sato Takahiro
Ueno Katsunori
Fahmy Wael
Farahani Dana
Fuji Electric Co., Ltds.
Rossi & Associates
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