Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2000-07-12
2002-06-04
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S737000
Reexamination Certificate
active
06400034
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device manufactured by using a flip chip connection to form external connection terminals.
2. Description of the Prior Art
There has been disclosed a semiconductor device manufactured by using a flip chip connection method in Japanese Patent Application Unexamined Publication No. 8-279571.
FIG. 1
shows an example of such a conventional semiconductor device. In
FIG. 1
, a semiconductor chip
1
is mounted on a substrate
15
through metal bumps
9
for connection. For a substrate material, a ceramic, a glass epoxy resin, or a plastic film may be used. Here, the substrate
15
is composed of a thin, flexible plastic film
10
having pads
11
and wiring conductors
12
formed on the top surface thereof through an adhesive layer
10
a
and having BGA (Ball Grid Array) pads
14
formed on the bottom surface thereof. A pad
11
and the corresponding wiring conductor
12
are electrically connected to the corresponding BGA pad by a through hole
13
.
On this substrate
15
, the semiconductor chip
1
is positioned such that the chip pads
1
a
of the semiconductor chip
1
are aligned with the pads
11
of the substrate
15
, and then thermocompression bonding is performed to mechanically and electrically connect the chip pads
1
a
with the pads
11
through, for example, metal bumps
9
such as tin, solder or the like. For example, in case of using tin as the metal bump, a force of 75 to 100 g per one bump is applied, keeping a temperature of bonding site 350° C. for 10 seconds in bonding operation.
Solder balls
7
are bonded to the BGA pads
14
to form external connection terminals, respectively. The space between the semiconductor chip
1
and the substrate
15
is filled with sealing resin
6
, which reinforces the coupling between the semiconductor chip
1
and the substrate
15
and also protects the surface of the semiconductor chip
1
.
A resin-filling step is carried out very carefully to avoid the mixing of bubbles into the sealing resin
6
. The semiconductor device completed is placed on a printed substrate and is heated in a reflow furnace or the like. As a result, the solder balls
7
melt and solder connections are made. If there is a void (a part in which the bubble is present) in the resin
6
when the semiconductor device is heated to become a high temperature, then inside air is expanded to explode the bubble, resulting in a damage of the semiconductor device. For prevention of this, degas operation is carried out in the resin-filling step by vacuum pumping for 10 minutes to remove the bubble in the resin filled.
Meanwhile, in the conventional semiconductor device as described above, the respective chip pads
1
a
of the semiconductor chip
1
are bonded to the substrate pads
11
by thermocompression bonding. However, a temperature condition in manufacturing steps sometimes caused a bad effect on a reliability of the semiconductor device. In the case of a low temperature in flip chip connection, the connecting part between the chip and the substrate has been insufficiently bonded to lower the reliability. Contrarily, in the case of a high temperature, the semiconductor chip may be deteriorated.
In the case of using a glass epoxy substrate for the substrate
15
, a low heat-resistant temperature thereof does not allow other choice than a material such as a solder or the like, which can be bonded at a relatively low temperature. However, using solder bumps is easy to cause a short circuit. As measures for this defect, respective pads have to be arranged with a certain distance, causing difficulties in making a fine pitch.
In order to solve this problem, a plastic film made of a material excellent for heat resistance, such as a polyimide, is used for the substrate. However, the conventional semiconductor device using the film substrate as shown in
FIG. 1
has an adhesive layer
10
a
, resulting in insufficient heat resistance. Therefore, the temperature in flip chip connection requires to be set low and the metal usable for the connecting part is restricted to tin (melting point: about 232° C.) to keep reliability. In addition, also having the adhesive layer
10
a
causes sinking of the connecting part by applying a high pressure in thermocompression bonding to lower the reliability of the connection.
There is another structural problem in the conventional semiconductor device such that the substrate structure becomes complicated because of through holes. As a result, the semiconductor device becomes costly.
In general, semiconductor devices to be shipped satisfy prescribed specifications by various inspections for product quality management or are ones of a lot simultaneously manufactured with one satisfying the specifications. Inspection of electric characteristics is conducted for a semiconductor device as a whole and also physical inspections are conducted
For example, it is very difficult to perfectly prevent the mixing of air bubbles into the sealing resin because of a microscopic step formed at a boundary region between the substrate and the wiring layer. Therefore, a 100% inspection or a sampling inspection for confirmation of no void is conducted by using an SAT machine in application of an ultrasonic wave to find and remove the semiconductor device out of the specificity.
Therefore, in view of product inspection, much inspection time is required because quality of connecting condition of the flip chip connecting part can be confirmed only by an indirect method such as an electricity flowing test. Likewise, quality of sealing condition by the sealing resin, that is, presence or absence of void, can be tested only by a large scale inspection instrument such as an ultrasonic machine. Thus, a simple inspection method is desired.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a high reliable semiconductor device with a chip-size package that has solved the above-mentioned problems.
Another object of the present invention is to provide a semiconductor device allowing further miniaturization with a finer terminal pitch.
Further another object of the present invention is to provide a semiconductor device allowing easy inspection of products.
According to the present invention, a semiconductor device includes a semiconductor chip having a plurality of chip pads formed on one side thereof in a predetermined pattern and a film substrate having the semiconductor chip connected thereon. The film substrate includes an insulating film having a plurality of openings formed in a desired pattern; a wiring layer formed on a chip-connecting surface of the insulating film; and a plurality of solder balls each directly bonded to the external connection pads through the openings. The wiring layer includes a plurality of substrate pads arranged in the predetermined pattern, the substrate pads each being connected to the chip pads of the semiconductor chip; and a plurality of external connection pads each being electrically connected to the substrate pads, the external connection pads each being formed over the openings so that the openings are covered with the external connection pads on the chip-connecting surface of the insulating film, respectively.
As described above, the film substrate having the wiring layer formed thereon is used to connect the chip pads of the semiconductor chip to respective ones of the substrate pads of the wiring layer. Therefore, a low-profile semiconductor device with finer pitch can be achieved with lower manufacturing cost.
Further, since the solder balls are directly bonded to respective ones of the external connect on pads of the wiring layer, easy manufacturing and Is allowed and a lower-profile semiconductor device can be achieved.
Preferably, a diameter of each of the openings tapers down in a direction toward the chip-connecting surface of the insulating film. This causes the solder balls to be easily and reliably bonded to the respective ones of the external connection pads. According to this structure, the
Isozaki Seiya
Kimura Takehiro
Hutchins, Wheeler & Dittmar
Le Bau T
NEC Corporation
Nelms David
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