Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2000-03-30
2002-12-17
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C257S510000, C438S011000, C438S014000, C438S018000
Reexamination Certificate
active
06495855
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The technology of device isolation has been treated with courteous attention as the technology for forming a device isolation region in a semiconductor device. In general, an oxide film embedded in a trench is abraded by Chemical Mechanical Polishing (CMP), in accordance with the device isolation by the trench. In an abrading process, the speed of abrading the embedded oxide film is different in accordance with the trench pattern thereof. In order to average the total abrading speed in the abrading process, a suitably even dummy active pattern is formed in the region in which an ordinary active region is not formed.
2. Description of the Related Art
However, in accordance with a conventional dummy active pattern, it has been insufficient to average CMP abrasion because of micronizing during the present time.
SUMMARY OF THE INVENTION
In order to solve the above-described problem, a semiconductor device of the present invention is characterized in that an active region for forming a device, in fact, a device separation region formed by a trench, and a dummy active region formed substantially in a rectangular shape are included, and the length of the short side of a dummy active region is less than 1 &mgr;m.
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Lee Eugene
Oki Electric Industry Co. Ltd.
Wenderoth , Lind & Ponack, L.L.P.
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