Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate
2000-07-12
2002-08-06
Jackson, Jr., Jerome (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
C257S784000, C257S782000, C257S773000, C257S780000
Reexamination Certificate
active
06429536
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to a semiconductor device, and more particularly to an electronic package using wire bonding technique wherein the electronic package comprises a chip disposed on a substrate having a ground ring, a power ring, and at least a surface-mountable device connected across the ground ring and the power ring.
2. Description of the Related Art
A semiconductor device typically includes a circuitized substrate with one or more active devices attached thereon; packages including only one device are known as Single Chip Modules (SCM), while packages including a plurality of devices are called Multi Chip Modules (MCM). The active device is typically a chip commonly made of Silicon, Germanium or Gallium Arsenide.
As the speed of semiconductor devices increase, noise in the DC power and ground lines increasingly becomes a problem. To reduce this noise, capacitors known as decoupling capacitors are often used to reduce power supply noise which occurs due to change in potential difference between the ground voltage and the power-supply voltage supplied to the active device. The decoupling capacitors are placed as close to the active device as practical to increase their effectiveness. Typically the decoupling capacitors are connected to power and ground as close as possible to the active device.
FIG. 1
shows a conventional BGA substrate
100
with a chip
110
securely attached t the metal paddle
102
on the upper surface of the substrate
100
. The upper surface of the substrate
100
is provided with a ground ring
104
, a power ring
106
, and a plurality of conductive traces
108
. The ground ring
104
is predetermined for coupling to a source of the ground reference voltage. The power ring
106
is predetermined for coupling to a source of the power reference voltage potential. In order to suppress the power supply noise described above, several decoupling capacitors
120
are connected across the ground ring
104
and the power ring
106
. Typically, the decoupling capacitors
120
are surface-mountable devices (SMD's) used in the so-called surface-mounting technique in which the capacitors
120
are directly secured to the ground ring
104
and the power ring
106
via two end contacts thereof (see FIG.
2
).
However, when these capacitors are on the substrate at the package level, they hinder the space available for the wire bonding. This is because it is generally preferred to avoid contact between the bonding wires and the capacitors thereby preventing short circuits from occurring. Therefore, the bonding wires
130
connected between the chip
110
and the ground ring
104
(or the power ring
106
) at the periphery of the decoupling capacitors
120
must keep away from the decoupling capacitors
120
thereby increasing difficulties and risks of wire bonding.
SUMMARY OF THE INVENTION
It is a primary object of the present invention to provide a semiconductor device comprising a chip disposed on a substrate having a ground ring, a power ring, and at least a surface-mountable device connected across the ground ring and the power ring, wherein the semiconductor device is characterized by having at least a bonding wire formed across the surface-mountable device and electrically connected to the chip and the power ring wherein at least one downward depression is formed in a lengthen portion at a top of the bonding wire for obtaining a stable wire loop shape with a high shape-retaining strength thereby preventing the bonding wire from contacting the surface-mountable device and causing a short circuit.
It is another object of the present invention to provide a semiconductor device characterized in that the surface-mountable device has at least a bonding section formed between the two end contacts thereof for bonding to two separate bonding wires that extends from the bonding section to the chip and the power ring, respectively, thereby preventing the bonding wires from contacting the surface-mountable device and causing a short circuit.
It is still another object of the present invention to provide a semiconductor device characterized in that the power ring has a protrusion portion extending away from the chip, and the protrusion portion is located corresponding to the surface-mountable device for bonding to the bonding wire connecting between the chip and the power ring thereby allowing a larger processing window during wire bonding, thereby enhancing the reliability of the bonding wire.
The semiconductor device of the present invention mainly comprises a chip disposed on the upper surface of a substrate. The upper surface of the substrate is provided with a ground ring, a power ring, and a plurality of conductive traces arranged at the periphery of the ground ring and the power ring. The semiconductor device comprises at least a surface-mountable device (such as a decoupling capacitor) connected across the ground ring and the power ring.
The semiconductor device according to a first preferred embodiment of the present invention is characterized by having at least a bonding wire formed across the surface-mountable device. The bonding wire has one end connected to one of the bonding pads of the chip and the other end connected to the power ring wherein at least one downward depression is formed in a lengthen portion at a top of the bonding wire.
The semiconductor device according to a first preferred embodiment of the present invention is characterized in that the surface-mountable device is provided with at least a bonding section formed on the surface-mountable device between the two end contacts thereof. Therefore, the chip can be electrically connected to the power ring through two separate bonding wires. The two bonding wires includes a first bonding wire having one end connected to one of the bonding pads of the chip and the other end connected to the bonding section on the surface-mountable device, and a second boning wire having one end connected to the bonding section on the surface-mountable device and the other end connected to the power ring.
According to the semiconductor device of the present invention, since the bonding wires predetermined to be connected between the chip and the ground ring (or the power ring) at the periphery of the surface-mountable device do not need to be kept away from the surface-mountable device, difficulties and risks of wire bonding for the semiconductor device are significantly reduced.
Further, the power ring of the semiconductor device in accordance with the present invention preferably has a protrusion portion extending away from the chip. The protrusion portion is located corresponding to the surface-mountable device for bonding to a bonding wire connecting between the chip and the power ring thereby allowing a larger processing window during wire bonding, thereby enhancing the reliability of the bonding wire.
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Cruz, Jr. Francisco C.
Liu Sheng-Tsung
Advanced Semiconductor Engineering Inc.
Chu Chris C.
Jackson, Jr. Jerome
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