Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – On insulating substrate or layer
Reexamination Certificate
2005-09-20
2005-09-20
Thai, Luan (Department: 2891)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
On insulating substrate or layer
C438S478000, C438S489000, C438S509000, C438S492000
Reexamination Certificate
active
06946370
ABSTRACT:
In a separation layer removing process α, temperature in a reaction chamber (heat treatment temperature TX) is raised to about 1000° C. and a separation layer A is evaporated through thermal decomposition, to thereby separate about 10 μm in thickness of protection layer B from a base substrate side (a sapphire substrate101comprising a buffer layer102). Because decomposition temperature of the separation layer A is higher than growth temperature of the protection layer B (about 650° C.) and lower than growth temperature of the semiconductor crystal C (about 1000° C.), the separation layer A vanishes (evaporates) by thermal decomposition, which generates this separation process. Accordingly, a semiconductor crystal having a cross sectional structure shown in FIG.2B is obtained. By employing the protection layer B which is independent from the base substrate side as another crystal growth substrate, dislocations and cracks may not be generated by stress owing to difference of lattice constants or difference of thermal expansion coefficients, and a semiconductor crystal layer C (GaN single crystal) of high quality can be obtained.
REFERENCES:
patent: 5571603 (1996-11-01), Utumi et al.
patent: 5620557 (1997-04-01), Manabe et al.
patent: 6294440 (2001-09-01), Tsuda et al.
patent: 6520557 (2003-02-01), Benthaus et al.
patent: 6584844 (2003-07-01), Beitia
patent: 3-183700 (1991-08-01), None
patent: 5-306194 (1993-11-01), None
patent: 7-165498 (1995-06-01), None
patent: 7-202265 (1995-08-01), None
patent: 11-68159 (1999-03-01), None
patent: 2000-12979 (2000-01-01), None
Translation of International Preliminary Examination Report for PCT/JP2002/07990 dated Jun. 24, 2004.
Koike Masayoshi
Watanabe Hiroshi
McGinn & Gibb PLLC
Thai Luan
Toyoda Gosei Co,., Ltd.
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