Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Patent
1995-05-24
1998-11-24
Hardy, David S.
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
257644, 257650, 438637, 438640, 438701, H01L 23532
Patent
active
058411950
ABSTRACT:
A method is provided for forming contact via in an integrated circuit. Initially, a first buffer layer is formed over an insulating layer in an integrated circuit. The first buffer layer has a different etch rate from the insulating layer. A second buffer layer is then formed over the first buffer layer, with the second buffer layer having an etch rate which is faster than the first buffer layer. An isotropic etch is performed to create an opening through the second buffer layer and a portion of the first buffer layer. Because the second buffer layer etches faster than the first buffer layer, the slant of the sideswalls of the opening can be controlled. An anisotropic etch is then performed to complete formation of the contact via.
REFERENCES:
patent: 4299024 (1981-11-01), Piotrowski
patent: 4476156 (1984-10-01), Brinker et al.
patent: 4587138 (1986-05-01), Yau et al.
patent: 4835597 (1989-05-01), Okuyama et al.
patent: 5041397 (1991-08-01), Kim et al.
patent: 5068711 (1991-11-01), Mise
Patent Abstract of Japan, vol. 011, No. 294 (E 544), Sep. 22, 1987 for Japan Publication No. 62-094959, May 1, 1987.
North et al., "Tapered Windows in Phosphorus-doped SiO.sub.2 by Ion Implantation," IEEE Transactions on Electron Devices, vol. ED-25, No. 7 (Jul. 1978), pp. 809-812.
Runyan, et al., "Spin-On Glasses," Semiconductor Integrated Circuit Processing Technology, pp. 152.-153.
Plasma Etching: An Introduction, edited by Manos and Flamm p. 164 (1989).
J. Electrochem. Soc., vol. 137, No. 10, Oct. 1990, pp. 3183-3188, by Shacham-Diamonnd et al., "The Characterization of the Residual Film Formed by Plasma Etching of Polysiloxane Spin-on-Glass on Aluminum".
J. Electrochem. Soc., vol. 137, No. 1, Jan. 1990, pp. 196-200, by Woo et al., "Characterization of Spin-On Glass Using Fourier Transform infrared Spectroscopy".
J. Electrochem. Soc.: Accelerated Brief Communication, Sep. 1982, pp. 2152-2154, by Ray et al., "Spin-On Glass as an Intermediate Layer in a Tri-Layer Resist Process".
Mat. Res. Soc. Symp. Proc., vol. 72, 1986 Materials Research Society, pp. 41-45, by Buchanan et al., "Glass Films and Interfaces in Microelectronics Applications".
Mat. Res. Soc. Symp. Proc., vol. 260, 199 Materials Research Society, pp. 335-340, by Weling et al., "Improved Planarization for a SOG Etchback process by Modifying the PECVD Oxide Film".
Solar Energy Materials 5 (1981), pp. 159-172, by Brinker et al., "Sol-Gel Derived Antireflective Coatings for Silicon".
J. Material Science 16 (1981), pp. 1980-1988, by Brinker et al., "Conversion of Monolithic Gels to Glasses in Multicomponent Silicate Glass System".
Thin Solid Films, 77 (1981), pp. 141-148, Metallurgical and Protective Coatings, by Brinker et al., "Comparisons of Sol-Gel-Derived Thin Films with Monoliths in a Multicomponent Silicate Glass System".
"Planarization with Spin-on-Glass/EPCVD Composite Films", pp. 52-53, by Dupuis et al.
Lin Yih-Shung
Liou Fu-Tai
Lu Lun-Tseng
Walters John Leonard
Wei Che-Chia
Carlson David V.
Galanthay Theodore E.
Hardy David S.
Jorgenson Lisa K.
STMicroelectronics Inc.
LandOfFree
Semiconductor contact via structure does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor contact via structure, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor contact via structure will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1706247