Semiconductor contact protection

Details Semiconductor contact protection Semiconductor contact protection

1984-06-22

1987-02-03

Czaja, Donald

Adhesive bonding and miscellaneous chemical manufacture

Delaminating processes adapted for specified product

Delaminating in preparation for post processing recycling step

156657, 1566591, 156662, 430314, 430317, 427 90, 357 67, H01L 21312, B44C 122

Patent

active

046407383

ABSTRACT:
In a photoresist lift-off process for depositing metal on a semiconductor substrate, a protective coating of silicon is applied to an etched via hole prior to the metal deposition step. This prevents the formation of contaminant trapping voids and contaminated chemical residues which would otherwise occur at the base of the metal line subsequently deposited in the bottom of the via hole. The protective silicon layer, which has a thickness of from 100 to 300 angstroms, remains intact as a permanent part of the structure.

REFERENCES:
patent: 3985597 (1976-10-01), Zielinski
patent: 4076575 (1978-02-01), Chang
patent: 4361599 (1982-11-01), Wourms
patent: 4367119 (1983-01-01), Logan et al.
patent: 4377633 (1983-03-01), Abrahamovich et al.
patent: 4410622 (1983-10-01), Dalal et al.
patent: 4514751 (1985-04-01), Bhattacharya
Hitchner, J. E., et al. "Chromium As An RIE Etch Barrier", IBM Technical Disclosure Bulletin, vol. 22, No. 10, Mar. 1980, pp. 4516-4517.

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