Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2003-01-27
2004-02-17
Wilson, Allan R. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S329000, C257S334000, C257S077000
Reexamination Certificate
active
06693322
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention lies in the semiconductor technology field. More specifically, the invention relates to a semiconductor construction for controlling a current flow. The semiconductor construction according to the invention comprises, in particular, an island region, which is at least partly buried in a first semiconductor region.
In order to supply an electrical load with a rated electric current, the load is usually connected to an electrical supply network via a switching device. During the switch-on operation and also in the case of a short circuit, an overcurrent occurs which lies significantly above the rated current. In order to protect the electrical load, the switching device connected between the load and the electrical network must be able to limit and also switch off the overcurrent. Current-limiting switches in the form of a semiconductor construction are known for this function.
U.S. Pat. No. 6,034,385 and international publication WO 00/16403 A1 disclose such a semiconductor construction, in which a current flow between a first and a second electrode is controlled. In particular, the current is switched on and off or limited to a maximum value. The active part of the semiconductor construction comprises a first semiconductor region of a predetermined conductivity type, in particular the n conductivity type. For current control, at least one lateral channel region is provided within the first semiconductor region. In this case, lateral is understood to mean a direction parallel to a surface of the first semiconductor region. By contrast, vertical denotes a direction running perpendicularly to the surface. The lateral channel region is bounded by at least one p-n junction, in particular by the depletion zone (zone with depletion of charge carriers and hence high electrical resistance; space charge zone) of the p-n junction, in the vertical direction. The vertical extent of the depletion zone can be set inter alia by a control voltage. The p-n junction is formed between the first semiconductor region and a buried p-conducting island region. The buried island region undertakes the shielding of the first electrode with respect to the high electric field in the reverse direction or in the switched-off state. In specific embodiments, the channel region can also be bounded by a further depletion zone in the vertical direction. The further depletion zone is brought about, by way of example, by a further p-n junction between a second p-conducting semiconductor region and the first n-conducting semiconductor region. Depending on the embodiment, a relatively high forward resistance can result in the case of the prior semiconductor construction. Moreover, for the exact setting of the lateral dimension of the channel region and also for the precise lateral positioning of the channel region within the semiconductor construction, the individual semiconductor regions have to be positioned very exactly relative to one another. This high alignment outlay is necessary in particular for the buried p-conducting island region and the second p-conducting semiconductor region.
A similar semiconductor construction is described in U.S. Pat. Nos. 5,895,939 and 5,963,807 and German patent application DE 196 29 088 A1. Consequently, this semiconductor construction also has a relatively high forward resistance, and it is again necessary to satisfy high requirements made of the alignment accuracy.
Furthermore, U.S. Pat. No. 5,543,637 discloses a semiconductor construction which comprises a first semiconductor region of a first conductivity type with a buried island region of a conductivity type opposite to the first, and also two electrodes and a control electrode. The respective depletion zones brought about by the control electrode and the buried island region again form a channel region in which a current flowing between the two electrodes is controlled. The control electrode is embodied either as a Schottky contact or as an MOS contact. 3C, 6H or 4H silicon carbide is used as semiconductor material. This semiconductor construction also has a relatively high forward resistance and requires a high precision in the alignment of the individual semiconductor regions.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a semiconductor construction with a buried island and a contact region which overcomes the above-mentioned disadvantages of the heretofore-known devices and methods of this general type and which specifies a semiconductor construction for current control which has a low forward resistance. At the same time, the intention is to improve the alignment outlay required for the local definition of the channel region by comparison with the prior art.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor construction for controlling a current, comprising:
a first semiconductor region of a first conductivity type having a first surface;
an island region of a second conductivity type, opposite the first conductivity type, at least partly buried within the first semiconductor region and having a second surface facing the first surface;
a contact region of the first conductivity type disposed at the second surface within the island region; and
a lateral channel region formed between the first surface and the second surface and forming a part of the first semiconductor region;
the channel region forming a part of a current path from or to the contact region;
at least one depletion zone for influencing a current within the channel region; and
the channel region having one lateral edge reaching to the contact region.
Expressed in different terms, the novel semiconductor construction is a configuration for controlling a current and it is formed of the following elements:
a) a first semiconductor region of a first conductivity type (n or p) having a first surface,
b) an island region of a second conductivity type (p or n), opposite to the first conductivity type, which is at least partly buried within the first semiconductor region and has a second surface facing the first surface,
c) a contact region of the first conductivity type (n or p), which is arranged at the second surface within the island region, and
d) a lateral channel region formed between first and second surfaces as part of the first semiconductor region,
d1) which channel region is part of a current path from or to the contact region,
d2) within which channel region the current can be influenced by at least one depletion zone, and
d3) one lateral edge of which channel region reaches as far as the contact region.
In this case, the invention is based on the insight that the relatively high forward resistance that can be observed in the case of the known semiconductor construction is brought about in particular by a so-called prechannel. This prechannel is situated between the actual lateral channel region and the contact region within the first semiconductor region. Since the first semiconductor region usually has to take up a large part of the voltage arising in the reverse direction or in the switched-off state, it normally has a relatively low doping rate. However, this results in a comparatively low electrical conductivity. The electric current carried in the forward state therefore experiences an electrical resistance that is all the greater, the longer its current path through the first semiconductor region. By virtue of the arrangement of the contact region within the buried island region, an electric current flowing out of the contact region directly enters into the lateral channel region which is critical for the current control. A prechannel, which is insignificant for the actual current control and would otherwise lead to an undesirable increase in the forward resistance, does not arise in the case of this particular arrangement of the contact region. Thus, the overall resultant forward resistance is significantly less than that of the known semiconductor construction.
Both in terms of l
Friedrichs Peter
Mitlehner Heinz
Schörner Reinhold
SiCED Electronics Development GmbH & Co. KG
Wilson Allan R.
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