Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2002-07-03
2003-12-23
Ngô, Ngân V. (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S335000, C257S341000, C438S268000
Reexamination Certificate
active
06667514
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The present invention relates to a semiconductor component with a change compensation structure and associated fabrication methods and, in particular, to a compensation component which has improved properties for interacting parameters, such as the breakdown voltage, the on resistance, and the robustness with respect to TRAPATT oscillations (Trapped Plasma Avalanche Triggered Transit).
U.S. Pat. Nos. 4,754,310 and 5,216,275 disclose theoretical investigations for semiconductor components with charge compensation structures with the object of improving the on resistance and robustness with regard to the avalanche breakdown and a short circuit in the high-current case with a high source-drain voltage.
The compensation principle of semiconductor components with charge compensation structure is essentially based on a reciprocal compensation of charges in n-doped and p-doped regions in the drift region of a transistor. In this case, the regions are spatially arranged such that the path integral over the doping along, for example, a line running vertically to the pn junction in each case remains below the material-specific breakdown charge (approximately 3×10
12
cm
−2
for silicon). By way of example, p-type and n-type pillars or plates or compensation regions may be arranged in pairs in a vertical transistor of the kind that is customary in power electronics.
By virtue of the extensive compensation of the p- and n-type dopings, the doping of the current-carrying region can be significantly increased in compensation components, which results in a significant gain in on resistance despite the loss of current-carrying area. In this case, the blocking capability of the transistor essentially depends on the difference between the two effective dopings. Since it is desirable for the current-carrying region to have a doping which is higher by at least one order of magnitude, for reasons of reducing the on resistance, controlling the reverse voltage requires controlled setting of the degree of compensation, which can be defined for values in the range≦±10%. This range becomes even smaller in the case of a higher gain of the on resistance. In this case, the degree of compensation can be defined by:
2*(p-type doping−n-type doping)/(p-type doping+n-type doping)
or by
2*charge difference/charge of the doping regions.
FIG. 1
shows a simplified partial sectional view of a compensation component according to the prior art.
In accordance with
FIG. 1
, a plurality of semiconductor layers are situated on a carrier substrate or in a second zone
1
, which is preferably n
+
-doped, which layers together form first compensation regions
2
of a first conductivity type (e.g. n). In this case, the charge compensation structure of the compensation component includes a plurality of compensation zones for forming a pillar-type second compensation region
3
, which is connected to a source electrode or first electrode layer S via a pn-forming zone
7
or an associated zone
7
′ of the second conductivity type (p
+
, p
++
) and a first zone
6
of the first conductivity type (n
+
). In this case, a drain electrode D is connected to the second zone
1
. A control layer or gate electrode G formed at the surface thus realizes, together with the source and drain electrodes, a field-effect transistor. In order to insulate the gate electrode G, in accordance with
FIG. 1
, a first insulation layer Is
1
or gate oxide layer is formed on the semiconductor material and a second insulation layer or an intermediate oxide Is
2
is formed toward the source electrode.
In compensation components, in the charge compensation structure below the actual field-effect transistor, p- and n-type regions are arranged next to one another or nested in one another in such a way that, in the off-state situation, their charges can be reciprocally depleted and that, in the turned-on state, there is a non-interrupted low-resistance conduction path from the source electrode S to a drain electrode or the second electrode layer D which is connected to the second zone
1
. For reasons of clarity, at this point reference is made to the description of semiconductor components with a charge compensation structure in, for example, German Patent No. DE 198 400 32 C1.
FIG. 2
shows a simplified sectional view for illustrating a fabricating step of the compensation component in accordance with FIG.
1
. Identical reference symbols designating identical or corresponding layers or elements.
In accordance with
FIG. 2
, on an n
+
-doped carrier substrate or the second zone
1
, a first semiconductor layer E
1
and a second semiconductor layer E
2
have already been deposited epitaxially for the purpose of forming the first compensation regions
2
, compensation zones
4
already being situated at the interfaces between the first and second semiconductor layers E
1
and E
2
. Accordingly, in order to realize the charge compensation structure illustrated in
FIG. 1
, firstly a carrier substrate
1
is provided and then a plurality of semiconductor layers E
1
to Ex are formed epitaxially, for example, a plurality of compensation zones
4
being formed at the surface of the respective epitaxial layers using a respective mask
5
.
Preferably, the volume to be patterned is firstly doped homogeneously with one type of charge, for example with donors (background doping). Afterward, the mask
5
is applied, for example as photoresist, and patterned in such a way that openings are produced at suitable locations. At the locations of the openings, acceptors, for example, are then introduced into the second semiconductor layer E
2
for example through the use of ion implantation or conventional doping from the gas/solid phase, as a result of which firstly relatively narrowly bounded compensation zones
4
are produced at the surface. In this case, a part of this dopant concentration is not electrically active, since it is intrinsically compensated by the background doping. This part must accordingly be kept in order to obtain a desired electrically active doping.
The operation illustrated in
FIG. 2
is repeated until a sufficiently thick n-multi-epitaxial layer with incorporated compensation zones
4
that are aligned with respect to one another and are stacked one above the other is present. In a subsequent step, the compensation zones
4
fabricated in this way can be outdiffused (as it were inflated) in such a way as to produce the pillar-type structure of the second compensation region
3
as illustrated in FIG.
1
. This outdiffusion is preferably produced during the formation of the zones
7
and
7
′ forming the pn junction, the first zone
6
, the first insulating layer Is
1
(gate oxide layer), the control electrode layer G, the second insulating layer Is
2
(intermediate oxide) and also the first electrode layer S. In contrast to conventional devices or semiconductor components, the breakdown location of (power) semiconductor components with charge compensation structure in accordance with
FIG. 1
does not lie near the surface, but rather preferably (for robustness reasons) deep in the voltage-accepting drift volume or semiconductor substrate E
1
to Ex or
1
. In the case of this construction, however, under unfavorable switching conditions extreme oscillation phenomena can arise which can destroy the semiconductor component or else the circuitry. Such a case can occur for MOS transistors with breakdown deep in the drift volume for example in the event of so-called avalanche breakdown:
In this case, firstly the MOS field-effect transistor is in the turned-on state and a very high channel current (of the order of magnitude of the rated current) is impressed via an inductance of, for example, external circuitry. If the transistor is then switched off, the inductance continues to draw current from the device, but this current is now no longer supplied as channel current, but as displacement current. As a result, the volume of t
Ahlers Dirk
Deboy Gerald
Weber Hans
Willmeroth Armin
Infineon - Technologies AG
Ngo Ngan V.
LandOfFree
Semiconductor component with a charge compensation structure... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor component with a charge compensation structure..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor component with a charge compensation structure... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3140067