Semiconductor component and method of manufacture

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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43, 43, 43, 43, 43, 43, 43

Reexamination Certificate

active

06998677

ABSTRACT:
A semiconductor component having a memory cell coupled to a trench line and a method for manufacturing the semiconductor component. Trenches having sidewalls are formed in a semiconductor substrate and a trench line is formed in each trench. A polysilicon insert is formed between the trench line and each sidewall of the trench. A column of memory cells is formed between the trenches where each memory cell of the column of memory cells has a gate structure, a source region, and a drain region. The source regions of the column of memory cells are electrically coupled to the trench line on one side of the column of memory cells via one of the polysilicon inserts. The drain regions of the column of memory cells are electrically coupled to the trench line adjacent the opposite side of the column of memory cells via another of the polysilicon inserts.

REFERENCES:
patent: 5045490 (1991-09-01), Esquivel et al.
patent: 5173436 (1992-12-01), Gill et al.
patent: 6449188 (2002-09-01), Fastow
patent: 6525368 (2003-02-01), Fastow
patent: 6525959 (2003-02-01), Fastow
patent: 6552435 (2003-04-01), Noble
patent: 6573137 (2003-06-01), Divakaruni et al.
patent: 6583479 (2003-06-01), Fastow et al.

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