Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
1999-04-02
2001-07-17
Tran, Andrew (Department: 2824)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C438S122000, C257S728000
Reexamination Certificate
active
06261868
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates, in general, to semiconductor devices and, more particularly, to semiconductor device packages.
Semiconductor transistor die are encapsulated for protection from damage by external stresses and to provide a means for carrying electrical signals to and from the devices. Included in the repertoire of semiconductor device package types are dual-in-line packages, pin grid array packages, TAB packages, multichip modules, and power packages. An important class of power packages is Radio Frequency (RF) power packages. These packages are typically used when the RF semiconductor transistor die dissipates power greater than ten watts and operates at frequencies greater than 100 megaHertz.
A power semiconductor device is typically comprised of a semiconductor die and a package or housing for the semiconductor die. The package includes a heatsink on which an insulator is bonded. Leads are then bonded to the insulator. The steps of bonding the insulator to the heatsink and bonding the leads to the insulator are typically performed at temperatures greater than 800° C. Subsequently, wirebonds are formed between the semiconductor die and the leadframe leads, and a lid is placed over the semiconductor die to protect it from external stresses. Because the steps of forming wirebonds and placing the lid over the semiconductor die are performed at temperatures around 450° C., any steps requiring higher processing temperatures, e.g., bonding the leadframe lead to the heatsink, are performed before the manufacturing steps that use lower processing temperatures. A drawback to this sequence of processing steps is that it complicates the manufacturing process, thereby decreasing the throughput and increasing the costs of manufacturing these devices. Another drawback that due to the differences between the coefficients of thermal expansion of the heatsink, the insulator, and the leads, the package becomes warped during its manufacture. Warped packages are unacceptable to the component manufacturers because of the difficulties they create in attaching the semiconductor transistor die to the package. Further, warped packages are unacceptable to end-users because the warpage diminishes the performance of the semiconductor devices and creates reliability issues.
Accordingly, it would be advantageous to have a power semiconductor component that does not have warped portions and a method for making the power semiconductor component. It would be of further advantage for the power semiconductor component to be cost efficient to manufacture and manufacturable with standard manufacturing techniques.
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Miller Gerald R.
Viswanathan Lakshminarayan
Hightower Robert F.
Motorola Inc.
Tran Andrew
Wilson Christian D.
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