Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
1998-11-16
2001-12-04
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S329000, C438S334000, C438S355000, C438S359000, C438S406000, C438S455000, C257S370000, C257S539000, C257S577000, C257S586000, C257S621000, C257S904000
Reexamination Certificate
active
06326292
ABSTRACT:
This application claims priority under 35 U.S.C. §§119 and/or 365 to 9704211-3 filed in Sweden on Nov. 17 1997; the entire content of which is hereby incorporated by reference.
TECHNICAL FIELD
The present invention relates to semiconductor components and in particular to a method of achieving a low resistance in semiconductor components comprising a buried conducting layer, and to such a semiconductor component.
BACKGROUND
Silicon on Insulator (SOI) materials offer a number advantages when making semiconductors, for example latchup immunity, galvanic insulation between components and reduced parasitic capacitance. The SOI material most frequently used today comprises a thin silicon layer, for example between 500 Å and 30 &mgr;m thick, on top of an insulating layer, such as silicon dioxide. The active components are located in the silicon layer and are isolated from each other by means of trenches that are etched down to the buried oxide and normally filled with oxide and polycrystalline silicon (polysilicon). Often, a buried conducting layer is used, which is then located adjacent to the buried oxide.
Such a conducting layer may be, for example, a collector in a bipolar component, or, in a field effect component, a drain. For simplicity, in the discussion below, the term collector, or buried collector, is used. Also the term collector resistance is used to describe the resistance from a contact at the surface to the buried conducting layer.
Depending on the component type, the component also comprises other doped areas, such as a base and an emitter in a bipolar component, a gate and a source in a field effect component, and an anode or a cathode in a diode.
To minimize costs, the area of the components should be minimized. Also the component's performance must be good like the collector resistance that should be low. The use of trenches enables the collector resistance to be minimized, if the trench wall is doped. This doped area surrounds the component and extends down to the buried collector. An alternative way of minimizing the collector resistance is to make a deep diffusion from the surface near the collector contact down to the buried collector. The dopants in the buried collector then at the same time diffuse upwards. This diffusion must be compensated for by using a thicker silicon layer. This adds an extra masking step to the manufacturing process, and it becomes more difficult to obtain insulation by means of trenches.
To minimize the area of the component, the trench wall may be kept without doping. An area of an opposite doping type, can then be placed relatively close to the trench, to form, for example, a base, an anode or a cathode. This results, however, in a degraded component performance in terms of an increased collector resistance. As a result of this, especially power transistors must be made very big.
SUMMARY
It is an object of the present invention to obtain a semiconductor component, with a buried collector, having a low collector resistance.
It is another object of the invention to obtain a comparatively small semiconductor component.
These objects are achieved according to the invention by a method of achieving a low resistance connection to a buried conducting layer in or below a device layer constituting part of a semiconductor component, said method comprising the following steps:
etching at least one trench in the device layer, delimiting the area of an active component;
applying a trench wall layer of a material in which a dopant diffuses faster than in the substance in which the buried layer is located, on the walls of the trench;
If an area on the surface of said active component in direct connection with the trench wall layer is doped, the dopant of this area will diffuse through said trench wall layer, and a short way into the device layer to form a contact to the buried layer.
The trench wall layer may comprise polysilicon or porous silicon, or a metal silicide. If polysilicon or porous silicon is used, the trench wall will only be conducting in the vicinity of the doped contact area. All other parts of the trench wall may therefore be placed arbitrarily near any other doped areas of the component, and even adjoining them.
Silicides are in themselves conductors; using a silicide will therefore result in an improved contact. On the other hand, the silicide cannot be used as near the base area of the component as polysilicon or porous silicon. The size of the component will therefore not be reduced compared to prior art components if silicide is used.
The invention offers the following advantages:
The semiconductor component with a low collector resistance may be achieved without any additional masking steps.
The yield and the reliability of the component can be increased, making use of a near by getter centre. Getter centres are areas that will capture metallic impurities that can otherwise degrade the performance of the component.
The upper silicon layer can be made thinner than when conventional techniques, with a deep diffusion from the top surface down to the buried collector are used. The component can be made smaller than with conventional techniques, such as doping of the trench walls. If the trench according to the invention is formed at an early stage, it will function as a getter centre, gettering metallic impurities.
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Sjodin Hakan
Soderbarg Anders
Anya Igwe U.
Burns Doane Swecker & Mathis L.L.P.
Smith Matthew
Telefonaktiebolaget LM Ericsson (publ)
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