Semiconductor circuit having output circuit whose slew rate...

Electronic digital logic circuitry – Signal sensitivity or transmission integrity – Output switching noise reduction

Reexamination Certificate

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Details

C326S087000, C326S083000

Reexamination Certificate

active

06320407

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor circuit, such as a data transmission circuit, etc. having an output circuit whose slew rate can be adjusted, a method for adjusting a slew rate of the semiconductor circuit, and an apparatus for automatically adjusting the slew rate of the output circuit.
2. Description of the Related Art
In a semiconductor circuit such as a data transmission circuit or the like, in order to achieve data transmission at high speed while decreasing data transmission cycles time, it is desired to increase the slew rate of an output signal from an output circuit forming an output stage of the data transmission circuit. If the slew rate is increased, the transmission waveform will not be satisfactory, due to an effect of frequency characteristics of a data transmission medium. Accordingly, in order to achieve both the high-speed data transmission and appropriately controlling of the transmission waveform, the data transmission circuit needs to be designed such that the slew rate of an output signal from its output circuit remains within a predetermined range of values.
Even if the data transmission circuit is thus designed, the slew rate of the output signal may not desirably be obtained, depending on the state of the manufactured output circuit or its usage period. In order to overcome this problem, there is disclosed a technique regarding an output buffer compensation circuit in Unexamined Japanese Patent Application KOKAI Publication No. H8-97693.
The disclosed circuit detects at least the current driving capacity of a semiconductor device included in an internal circuit P
2
, using a ring oscillator which is formed on a substrate P
3
on which the semiconductor device is formed. In accordance with this resultant detection, a variable resistance value of a variable resistance element forming an output buffer is controlled so as to compensate for the slew rate of the semiconductor device. While compensating for the slew rate, a controlling signal generated using a counter or two D/A converters is used, and an MOS transistor is employed as a variable resistance element.
In the output buffer compensation circuit disclosed in the publication, the current driving capacity of the semiconductor device in the internal circuit P
2
is detected using the ring oscillator. The detection of the current driving capacity of how much current can flow is detection of the resistance value according to Ohm's law, i.e., I=V/R. Accordingly, in the disclosed circuit, the slew rate compensation is performed by detecting the current driving capacity. In such a structure, if the same type of transistor as that included in the internal circuit or the ring oscillator is employed in the output buffer, it can be expected that slew rate compensation is achieved in the structure where the resistance of the transistor in the output buffer varies.
The slew rate can be obtained based on a time constant which is a product of a resistance value and parasitic capacitance in the output buffer. Thus, the accurate slew rate of the output buffer can not entirely be adjusted in a circuit having the structure where the parasitic capacitance has an effect. According to the disclosed technique, at least two D/A converters for generating a controlling signal for slew rate adjustment are necessary. In this structure, in order to maintain the accuracy of the D/A converters and to appropriately set a desired variable resistance value, the size of the compensation circuit is unwantedly increased and a complicated technique needs to be developed for manufacturing a compensation circuit.
SUMMARY OF THE INVENTION
The present invention has been made in consideration of the above problems. It is accordingly an object of the present invention to provide a semiconductor circuit having an output circuit whose slew rate can appropriately be adjusted and set to a desired value with high accuracy, and a method for adjusting a slew rate of the output circuit without any complicated process.
Another object thereof is to provide an apparatus for automatically adjusting a slew rate of an output circuit which is included in a semiconductor circuit.
In order to achieve the above objects, according to the first aspect of the present invention, there is provided a semiconductor circuit including an output circuit whose slew rate can be adjusted and which outputs a signal, sent form an internal circuit, said semiconductor circuit comprising:
at least one output circuit which outputs a signal sent from an internal circuit externally, and whose slew rate is adjusted in response to a setting signal;
a replicated output circuit which has a same structure as a structure of the output circuit, receives a pulse signal and outputs the pulse signal, and whose slew rate is adjusted in response to the setting signal;
a pulse signal supplier for slew rate adjustment which supplies the replicated output circuit with the pulse signal for slew rate adjustment; and
a setting signal supplier which supplies the setting signal for setting a slew rate of the output circuit and the replicated output circuit.
In the structure, the slew rate of the replicated output circuit can be set by tuning the setting signal while observing the pulse signal output form the replicated output circuit. The slew rate of the output circuit is adjusted to be substantially same as the slew rate of the replicated output circuit.
According to this invention, having set the slew rate of the replicated output circuit, the setting of the slew rate of the output circuit can be easily completed. In addition, because the replicated output circuit has the same structure as that of the output circuit, no special or complicated technique for manufacturing the semiconductor circuit is necessary. The replicated output circuit and the output circuits are to have different levels of manufacturing accuracy and different amounts of parasitic capacity between the two. However, according to the structure of the present invention, the output circuits and the replicated output circuit have the same structures and desirably are formed on the same semiconductor substrate, thus the manufacturing accuracy and the parasitic capacity are the same between the two. Therefore, having set the slew rate of the replicated gate, the slew rate of the output circuits can be adjusted with high accuracy.
The pulse signal supplier may comprise a pulse generator which generates the pulse signal and supplies the pulse signal to the replicated output circuit or a pulse supplying terminal through which the pulse signal is supplied to the replicated output circuit.
In the structure, the pulse signal supplied is supplied from the pulse signal supplier, and the slew rate of the replicated output circuit is set. Then, the slew rate of the replicated output circuit is set based on the setting signal from the setting unit. The slew rate of the output circuit is adjusted to be substantially same as the slew rate of the replicated output circuit.
In the above-structured semiconductor circuit, the slew rate of the replicated output circuit can be set by varying resistance of the replicated circuit based on received setting signals, and the setting signal supplier supplies the setting signal comprised of digital signals generated upon operations of switches. In this structure, the replicated output circuit receives the digital signals generated upon operations of switches. The slew rate of the replicated output circuit can be set by varying, for example, resistance of the replicated output circuit based on the received digital signals, thus realizing easy slew rate adjustment by operating the switches.
According to the second aspect of the present invention, there is provided a method for adjusting the slew rate of the output circuit included in the above semiconductor circuit, the method comprising:
controlling the pulse signal supplier to supply the replicated output circuit with a pulse signal having a predetermined frequency; and
controll

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