Static information storage and retrieval – Read/write circuit – Data refresh
Patent
1998-07-07
2000-05-02
Phan, Trong
Static information storage and retrieval
Read/write circuit
Data refresh
365226, G11C 700
Patent
active
060580615
ABSTRACT:
In a DRAM employing a shared sense amplifier method, a bit line select signal falls to the level of ground potential after a potential difference is generated between a pair of bit lines and sense nodes in response to activation of a word line in a self refresh mode for disconnecting the bit line pair in a memory block including the activated word line from a sense amplifier. When the potentials of the sense nodes are amplified by the sense amplifier, the disconnected bit line pair is connected again to the sense amplifier.
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Mitsubishi Denki & Kabushiki Kaisha
Phan Trong
Tran M.
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