Static information storage and retrieval – Read/write circuit – Testing
Patent
1997-05-14
1999-09-21
Yoo, Do Hyun
Static information storage and retrieval
Read/write circuit
Testing
36518909, 365193, 365195, 3652257, 365226, G11C 700
Patent
active
059562781
ABSTRACT:
In a DRAM (Dynamic Random Access Memory) having a voltage down converter, a driver transistor in the voltage down converter is connected parallel to another driver transistor, thus the driver transistor is selectively inactivated in response to a test mode signal TE which is activated by detection of WCBR and an address key. Therefore, an optimal gate width of driver transistors can be easily evaluated when the voltage down converter oscillates.
REFERENCES:
patent: 5249155 (1993-09-01), Arimoto et al.
patent: 5612920 (1997-03-01), Tomishima
patent: 5644250 (1997-07-01), Ooishi
Mitsubishi Denki & Kabushiki Kaisha
Yoo Do Hyun
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