Semiconductor circuit device and simulation method of the same

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

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C716S030000

Reexamination Certificate

active

07462914

ABSTRACT:
A first PMIS transistor includes a first active region which is formed on a semiconductor substrate and a first gate electrode which is formed on the first active region and which is connected at one end thereof to a first gate wiring and includes at the other end thereof a first protruding portion protruding at a side opposite to the first gate wiring side from the first active region A first NMIS transistor includes a second active region which is formed on the semiconductor substrate with a space left from the first active region and a second gate electrode which is formed on the second active region and which is connected at one end thereof to the first gate wiring and includes at the other end thereof a second protruding portion protruding at a side opposite to the first gate wiring side from the second active region. A protruding length of the first protruding portion of the first PMIS transistor is greater than a protruding length of the second protruding portion of the first NMIS transistor.

REFERENCES:
patent: 7105901 (2006-09-01), Miyanishi et al.
patent: 2006/0006474 (2006-01-01), Tsuboi
patent: 2007/0228488 (2007-10-01), Kishii et al.
patent: 2003-264242 (2003-09-01), None

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