Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Smart card package
Reexamination Certificate
1999-03-23
2001-03-13
Saadat, Mahshid (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Smart card package
C257S922000, C257S531000, C257S787000, C257S788000
Reexamination Certificate
active
06201296
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to a semiconductor chip having at least one capacitor and an electrically insulating layer that forms a dielectric for the capacitor, as well as an evaluation circuit which disables the semiconductor chip if the layer is removed.
Such a semiconductor chip is known from U.S. Pat. No. 4,868,489. In that patent, the dielectric property of the passivation layer of the semiconductor chip is used in order to make it possible to detect a removal of this passivation layer. However, this detection is carried out only by a direct measurement of the capacitance of two neighboring metallic surfaces.
Published German Patent Application DE 40 18 688 A1 discloses detecting the capacitance, inductance and resistance of a conducting surface, which is applied to the semiconductor chip surface and covers the underlying circuits, in order to make it possible to ascertain when this protective layer has been removed. This involves however determining the capacitance relative to the underlying layers. Furthermore, the inductance of such a surface is very small, so that an evaluation requires circuits which are highly sensitive and therefore elaborate and expensive.
The costs involved in developing an integrated circuit, hereinafter referred to as semiconductor chip, are known to be very high, while production costs, in particular in very large production runs, may be comparatively low. Semiconductor chips are therefore exposed to the risk of being analyzed and copied without permission. For this reason, as already indicated above, various measures have been developed which are intended to prevent unauthorized analyzing of the way in which a semiconductor chip functions, as well as its structure.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide a semiconductor chip with an improved protection against analyzing which overcomes the above-mentioned disadvantages of the heretofore-known semiconductor chips of this general type.
With the foregoing and other objects in view there is provided, in accordance with the invention, a semiconductor device, comprising:
a semiconductor chip having a coil and a capacitor which define an oscillating circuit with a resonant frequency;
an electrically insulating layer forming a dielectric for the capacitor and covering the semiconductor chip; and
an evaluation circuit connected to the oscillating circuit for detecting a detuning of the oscillating circuit due to a change in the resonant frequency caused by altering the electrically insulating layer, the evaluation circuit disabling the semiconductor chip upon detecting the detuning of the oscillating circuit.
In accordance with another feature of the invention, the semiconductor chip has a top surface, at least the coil being formed as a metallic conductor track over the top surface.
In accordance with yet another feature of the invention, the metallic conductor track includes parallel conductor track sections, the capacitor being formed by the parallel conductor track sections.
In accordance with a further feature of the invention, a plurality of oscillating circuits are coupled for oscillating.
In accordance with yet a further feature of the invention, the semiconductor chip has a surface and the coil spans the surface substantially entirely.
In accordance with another feature of the invention, the capacitor substantially entirely occupies the top surface at free surface areas thereof.
In accordance with yet another feature of the invention, the evaluation circuit, after the electrically insulating layer is applied, ascertains the resonant frequency of the oscillating circuit and drives the oscillating circuit during an operation of the semiconductor chip.
In accordance with another feature of the invention, the evaluation circuit drives the oscillating circuit at a preset frequency.
In accordance with yet another feature of the invention, the electrically insulating layer forms a cover for the semiconductor chip, the evaluation circuit detects the detuning of the oscillating circuit when the cover is removed.
The object of the invention is in particular achieved by the semiconductor chip having at least one inductor which, together with the capacitor, forms a resonant oscillating circuit, so that the oscillating circuit is detuned if the resonant frequency of the oscillating circuit changes due to changing the semiconductor chip's cover which forms a layer of dielectric for the capacitor.
A basic idea of the invention is therefore to produce an electrical coupling with the cover, wherein the electrical coupling is needed for the semiconductor chip to function. This coupling is achieved by the fact that the cover forms a necessary element of an oscillating circuit, having an inductor and a capacitor. The cover effects the dielectric constant of the capacitor of the oscillating circuit. If the cover is tampered with, or if the cover is removed, then the semiconductor chip can no longer be operated on account of the detuning of the resonant circuit. However, since operation of the semiconductor chip is a prerequisite for detailed analyzing, reliable protection against analyzing and copying of the semiconductor chip is therefore obtained.
If the cover is removed or modified, the oscillating properties of the oscillating circuit also change. Either the resonant frequency is shifted or the ability to oscillate is lost. In both cases, the oscillating circuit is stopped from resonating and the evaluation circuit permanently disables the semiconductor chip. Security is further increased if there are a plurality of oscillating circuits, which are coupled to one another. An attempt, after removing the cover, to fit a replacement circuit with reconstruction of the tuning is doomed to failure as a result of this measure.
According to a further embodiment of the invention, the evaluation circuit is constructed in such a way that following the application of the cover to conclude the production process of the semiconductor chip, the evaluation circuit automatically ascertains the resonant frequency of the oscillating circuit or circuits and drives them at resonance during the operation of the semiconductor chip. The resonant frequency is determined only once before the semiconductor chip is being used. After any removal of the cover, it is impossible to retune the oscillating circuit or the oscillating circuits as they were originally. In this embodiment, the effect of fabrication tolerances on the tuning of the oscillating circuit or the oscillating circuits is compensated or neutralized since the evaluation circuit according to the invention ascertains the tuning when the semiconductor chip and the cover are in a fully assembled state.
Alternatively, a high security can also be achieved if the evaluation circuit is configured in such a way that it drives the oscillating circuit or the oscillating circuits with a fixed frequency. The fixing of the specific resonant frequency, or the tuning to a standard value by the evaluation circuit, is carried out automatically and cannot be accessed externally.
In principle, the inductor and the capacitor of the oscillating circuit or oscillating circuits may be formed as metallic structures under a hermetically sealing surface layer of the semiconductor chip. Particularly simple production can, however, be achieved if the inductor(s) and capacitor~s) are applied as metallic conductor tracks directly to the surface layer of the chip. A capacitor will preferably be formed by parallel conductor track sections of an inductor. This has the advantage that the inductor and capacitor can be constructed as a simple geometrical structure.
The sensitivity of the oscillating circuit is preferably increased by an inductor and/or capacitor that spans or occupies the entire chip surface.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in a semiconductor chip with pro
Fries Manfred
Stampka Peter
Fenty Jesse A.
Greenberg Laurence A.
Lerner Herbert L.
Saadat Mahshid
Siemens Aktiengesellschaft
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