Semiconductor chip stack package

Details Semiconductor chip stack package Semiconductor chip stack package

1997-06-16

1999-06-08

Brown, Peter Toby

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

257686, 257723, H01L 2302

Patent

active

059106824

ABSTRACT:
A semiconductor chip stack package includes a plurality of semiconductor chips, each having a plurality of chip pads formed on an upper surface and a plurality of wires respectively coupling a corresponding one of the plurality of chip pads to an edge portion of the semiconductor chip. A package body is formed by stacking the plurality of semiconductor chips one over another using a first adhesive medium. A tab tape attaches to a second side surface of the package body using a third adhesive medium. A heat sink attaches to each of a lower, upper and first side surfaces of the package body using a second adhesive medium. Then, a plurality of solder balls is formed on a lower surface of the tab tape for coupling to an external medium, such as a printed circuit board. The stack package facilitates external emission of the heat generated by the semiconductor chips to prevent the stack package reliability from deterioration.

REFERENCES:
patent: 5619067 (1997-04-01), Sua et al.
patent: 5714802 (1998-02-01), Cloud et al.

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