Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
1998-07-23
2003-02-11
Chang, Rick K. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S832000, C029S840000
Reexamination Certificate
active
06516516
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor chip package, and more particularly to a semiconductor chip package having a clip-type lead frame and fabrication method thereof for enabling a variety of mountings on a printed circuit board.
2. Description of the Prior Art
As shown in
FIGS. 1A and 1B
showing an inner structure of a semiconductor chip package according to a conventional art, a lead frame
3
provided in semiconductor chip packages
1
,
1
′ includes a die paddle
4
having a semiconductor chip
2
attached thereon, a plurality of inner leads
5
adjacent to the die paddle
4
, and a plurality of outleads
6
each extended from a corresponding one of the inner leads
5
.
In the packages
1
,
1
′ having such a lead frame structure, the chip
2
attached on the die paddle
4
is electrically connected to the inner leads
5
of the lead frame
3
, and the die paddle
2
having the chip
2
thereon and the inner leads
5
are molded by a molding compound
8
.
The fabrication of the thusly composed semiconductor chip package is completed by carrying out: a die bonding for attaching the semiconductor chip
2
sliced off from a wafer on the die paddle
4
of the lead frame
3
; a wire bonding for electrically connecting a chip pad (not shown) provided on the chip
2
to a corresponding one of the inner leads
5
of the lead frame
3
; molding a certain area including the paddle
4
having the chip
2
thereon and the inner leads
5
by the molding compound
8
; a trimming process for trimming a support bar (not shown) which connects the lead frame
3
to the paddle
4
, a dam bar (now shown) connecting the outleads
6
to each other, and a section bar (not shown), thus to fabricate the packages
1
,
1
′; and a forming process for bending each of the outleads
6
to a certain extent to form a desired shape, thereby completing the fabrication of the chip packages
1
,
1
′.
However, the conventional semiconductor package has disadvantages in that a lead frame has to be formed separately depending on each of a variety of chip packages, and in particular when applied to a reverse type, a fabrication process or the shape of a lead frame has to be modified.
Further, the conventional semiconductor chip package has difficulty in stacking a plurality thereof on a PCB, and has led to an decreased electrical property due to a lengthened transfer path of a signal.
BRIEF DESCRIPTION OF THE PRESENT INVENTION
Accordingly, it is a first object of the present invention to provide a semiconductor chip package having a clip-type outlead and fabrication method thereof applicable to a variety of semiconductor chip packages and not required of modifying a fabrication process or a lead frame structure in mounting a reverse type or a horizontal type of outleads.
It is a second object of the present invention to provide a semiconductor chip package having a clip-type outlead and fabrication method thereof for easily stacking a plurality of semiconductor chip packages on a PCB.
It is a third object of the present invention to provide a semiconductor chip package having a clip-type outlead and fabrication method thereof for enhancing an electrical property by decreasing an electrical path.
To achieve the above-described objects, a clip type lead frame according to a preferred embodiment of the present invention includes a semiconductor chip having a plurality of bond pads thereon, a first package body having a recess formed in an upper surface thereof for receiving the semiconductor chip, a plurality of inner leads each connected electrically to a corresponding one of the bond pads, a plurality of outleads each extended from a corresponding one of the inner leads for covering along sides of the first package body, and a second package body which covers the semiconductor chip, a plurality of metallic wires and the inner leads.
Further, the fabrication method according to the present invention includes the steps of forming a first package body having a recess therein, attaching to the first package body a plurality of inner leads and outleads extended from the inner leads thus to be coveringly exposed on sides of the first package body, attaching in the recess a semiconductor chip having a plurality of bond pads thereon, wire-bonding for electrically connecting each of the inner leads by a metallic wire to a corresponding one of the bond pads provided on the semiconductor chip, and forming a second package body for covering the semiconductor chip, the inner leads and the metallic wires.
REFERENCES:
patent: 4079511 (1978-03-01), Grabbe
patent: 5084694 (1992-01-01), Kikuchi
patent: 5097246 (1992-03-01), Cooke et al.
patent: 5471088 (1995-11-01), Song
patent: 5554886 (1996-09-01), Song
patent: 5604978 (1997-02-01), Sherif et al.
patent: 5625221 (1997-04-01), Kim et al.
patent: 5818107 (1998-10-01), Pierson et al.
patent: 52-19971 (1977-02-01), None
patent: 5-183103 (1993-07-01), None
Chang Rick K.
Fleshner & Kim LLP
Hyundai Electronics Industries Co,. Ltd.
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