Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package
Reexamination Certificate
2001-10-01
2004-04-20
Zarabian, Amir (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
C257S110000
Reexamination Certificate
active
06724075
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention generally relates to an electronic device, and more particularly to a semiconductor chip package and a manufacturing method thereof.
2. Description of the Related Art
FIG. 1
depicts a conventional semiconductor chip package including a lead frame for supporting a semiconductor chip
100
. The lead frame includes a plurality of leads having outer lead portions
106
and inner ends
107
. The chip
100
is attached onto a die pad
111
by means of a silver paste
114
. The die pad
111
is connected to the lead frame by several supporting bars (not shown in FIG.
1
). The outer lead portions
106
are used for electrical coupling to an outside circuit. The chip
100
has bonding pads
117
electrically interconnected to the inner ends
107
of the lead frame though bonding wires
115
. The chip
100
, the die pad
111
, the inner ends
107
of the lead frame and bonding wires
115
are encapsulated in a plastic package body
116
made of insulating material such as epoxy.
Because the plastic package body
116
completely surrounds the chip
100
, the heat generated from the chip
100
during normal operation must pass through the package body
116
to outside. Due to the insulating properties of the package body
116
, heat dissipation from the chip
100
is resisted, thereby creating, in some instances, high temperatures within the conventional package which might impair or damage the chip
100
.
Therefore, the semiconductor industry develops a leadless semiconductor package
200
(as shown in
FIG. 2
) mainly comprising a chip
210
attached on a die pad
220
of a lead fame via an adhesive layer. The lead frame comprises a plurality of leads
230
electrically connected to the chip
210
through a plurality of bonding wires
240
. The chip and the lead frame are enclosed in a package body
250
wherein the lower surface of the lead frame is exposed through the package body
250
. Consequently, the heat generated from the semiconductor chip during normal operation can be directly transferred through the die pad
220
of the lead frame to outside thereby enhancing the thermal performance of the leadless semiconductor chip package
200
.
However, since the lower surface of the lead frame is exposed through the package body, flash problems tend to occur at the edge
230
a
of the leads
230
and the edge
220
a
of the die pad
220
. This may be fatal to the solder joint reliability of the leads
230
and adversely affect the thermal performance of the die pad
220
. Furthermore, as IC device moves its endless pace toward lighter, thinner and smaller in size, the traditional packages described above cannot fully meet the requirement of low profile. Accordingly, there exists a need in the art of semiconductor packaging for a package structure capable of providing a further reduced profile.
SUMMARY OF THE INVENTION
It is a primary object of the present invention to provide a semiconductor chip package characterized by having a semiconductor chip with a metal layer formed over the backside surface thereof which is encapsulated in a package body such that the metal layer is exposed from the bottom of the package body, thereby acquiring a better thermal performance.
It is a secondary object of the present invention to provide a method for manufacturing a semiconductor chip package wherein the lead frame is skipped thereby significantly reducing the package profile.
To achieve the above listed and other objects, the present invention provides a semiconductor chip package comprising a semiconductor chip with a metal layer formed over the backside surface thereof and a package body encapsulating the chip in a manner that the metal layer on the backside surface of the chip is exposed from the bottom surface of the package body. The package body has a plurality of protruding potions projecting from the bottom surface of the package body. A plurality of bonding wires each has one end electrically connected to the semiconductor chip and the other end exposed from one of the protruding portions of the package body for electrical coupling to an outside circuit. Preferably, the exposed end of each bonding wire has a longitudinal length at least four times larger than the diameter of the bonding wire. It is noted that the metal layer on the backside surface of the chip is directly exposed from the bottom surface of the package body thereby enabling a better thermal dissipation so as to extend the chip's lifetime. Due to elimination of the conventional lead frame, the semiconductor chip package of the present invention features lower profile and light weight.
According to a first embodiment of the present invention, there is provided a method for manufacturing the semiconductor chip package comprising the steps of: (a) attaching a tape onto a rigid metal plate so as to form a tape/plate assembly; (b) attaching a semiconductor chip onto the tape/plate assembly through an adhesive layer on the upper surface of the tape wherein the tape has a plurality of holes formed at the peripheral of the semiconductor chip; (c) connecting a first ends of bonding wires to the semiconductor chip and a second ends of the bonding wires to the rigid metal plate through the holes of the tape; (d) encapsulating the semiconductor chip and the bonding wires against a portion of the tape/plate assembly with a package body; and (e) removing the rigid metal plate and the tape after the encapsulating step such that the second ends of the bonding wires are exposed from the package body.
According to a second embodiment of the present invention, there is provided a method for manufacturing the semiconductor chip package comprising the steps of: (a) attaching a tape onto a rigid metal plate so as to form a tape/plate assembly; (b) forming a metal flash on certain area of the rigid metal plate which is exposed from the holes of the tape; (c) attaching a semiconductor chip onto the tape/plate assembly wherein the tape has a plurality of holes formed at the peripheral of the semiconductor chip; (d) connecting a first ends of bonding wires to the semiconductor chip and a second ends of the bonding wires to the metal flash through the holes of the tape; (e) encapsulating the semiconductor chip and the bonding wires against a portion of the tape/plate assembly with a package body; and (f) removing the tape and the rigid metal plate including the metal flash after the encapsulating step such that the second ends of the bonding wires are exposed from the package body.
According to a third embodiment of the present invention, there is provided a method for manufacturing the semiconductor chip package comprising the steps of: (a) attaching a tape onto a nonmetal rigid plate so as to form a tape/plate assembly; (b) forming a metal flash on the surface of the tape/plate assembly by electroless plating; (c) attaching a semiconductor chip onto the metal flash on the tape/plate assembly; (d) connecting a first ends of bonding wires to the semiconductor chip and a second ends of the bonding wires to the metal flash on the nonmetal rigid plate through the holes of the tape; (e) encapsulating the semiconductor chip and the bonding wires against a portion of the tape/plate assembly with a package body; and (f) removing the tape and the nonmetal rigid plate including the metal flash after the encapsulating step such that the second ends of the bonding wires are exposed from the package body.
In the semiconductor chip packaging methods according to the present invention, the conventional lead frame is skipped thereby significantly reducing the finished package's profile.
REFERENCES:
patent: 5900676 (1999-05-01), Kweon et al.
patent: 6159770 (2000-12-01), Tetaka et al.
Lee Cheng Yin
Lee Chun Chi
Lee Shih Chang
Advanced Semiconductor Engineering Inc.
Lowe Hauptman & Gilman & Berner LLP
Rose Kiesha
Zarabian Amir
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