Semiconductor chip package and fabrication method thereof

Details Semiconductor chip package and fabrication method thereof Semiconductor chip package and fabrication method thereof

1997-09-04

1999-11-30

Fahmy, Wael M.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

257737, 257712, 257779, 257750, 438613, H01L 2192, H01L 2329

Patent

active

059947837

ABSTRACT:
A chip package according to an embodiment of the present invention includes an integrated chip having a plurality of chip pads formed thereon, and a passivation film formed in such a manner that the chip pads are exposed. A plurality of metal wirings are connected to the chip pads on the upper surface of the passivation film, and externals balls electrically connected to the metal wirings. A molding resin layer is formed on the upper portion of the semiconductor chip such that the upper surfaces of the external balls protrude therefrom.

REFERENCES:
patent: 5046161 (1991-09-01), Takada
patent: 5600180 (1997-02-01), Kusaka et al.
patent: 5629564 (1997-05-01), Nye, II et al.
Jadus, Flip chip terminal for semiconductor devices, IBM Technical Disclosure Bullettin vol. 21, No. 3, p. 1007, Aug. 1978.
Technical Proceedings, SEMI Technology Symposium, Session 6, Packaging Technology, pp. 497-505(Dec. 2, 1994) Mitsubishi Corporation.

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