Semiconductor chip package

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S106000, C257S734000, C257S738000, C257S108000, C257S772000, C257S779000, C257S762000, C257S612000, C257S613000, C257S615000

Reexamination Certificate

active

06294828

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention involves a method for joining a semiconductor integrated circuit chip to a chip carrier substrate and the resulting chip package.
2. Description of the Related Art
In one class of chip packages, one or more semiconductor integrated circuit chips are mounted face down, in the so-called flip chip configuration, onto solderable metal pads on the circuitized surface of a chip carrier substrate, e.g., ceramic substrate, via solder balls. Such mounting is achieved by applying solder balls, having a composition which includes, for example, 97 percent (by weight) Pb and 3 percent (by weight) Sn, to contact pads on the circuit-bearing surface of each semiconductor chip. In addition, a solder mask is formed on the circuitized surface of the chip carrier substrate to prevent solder from flowing beyond the boundaries of the solderable metal contact pads on this circuitized surface. Then, the solder balls on the chip contact pads are brought into contact with the solderable metal contact pads on the substrate circuitized surface, and a fluxing agent, often including chloro-fluoro-carbons (CFCs), is applied to the solder balls in order to eliminate oxide layers which may have formed on the surfaces of the solder balls and/or solderable metal contact pads. Finally, the solder balls are heated to a sufficiently high temperature, e.g., 330 degrees C, so that they melt and undergo reflow. Upon cooling and re-solidification, the solder balls form firmly adherent, mechanical and electrical connections between the contact pads on each chip and the solderable metal contact pads on the chip carrier substrate.
If the chip carrier substrate is, for example, a ceramic substrate, such as an alumina substrate, then the above-described chip joining process is definitely effective and results in a useful and commercially valuable chip package. That is, neither the presence of the solder mask, nor the reflow process, during the chip joining process is at all adverse to the final chip package. Of course, the use of fluxing agents containing CFCs is considered environmentally undesirable, and attempts are now being made to replace such fluxing agents with fluxing agents which do not contain CFCs.
Significantly, a new type of chip package is now being developed which includes one or more semiconductor chips mounted in the flip chip configuration on an organic chip carrier substrate, such as a polyimide chip carrier substrate. Because such a polyimide substrate is often processed while in a tape- or roll-like form, and because the bonding of a chip or chips to such a polyimide substrate is typically achieved via an automated bonding process, such an organic substrate is often referred to as a TAB (tape automated bonding) substrate or TAB-like substrate. Here, the one or more semiconductor chips are mounted face down, via solder balls, onto solderable metal contact pads or leads or circuit lines (hereinafter generically referred to as solderable metal contact pads) on the circuitized surface of the organic chip carrier substrate.
Unfortunately, the chip joining process used in connection with ceramic chip carrier substrates is disadvantageous when used in connection with organic chip carrier substrates, such as polyimide chip carrier substrates. That is, one of the advantages of, for example, polyimide substrates is that they are highly flexible, which makes them more useful than the relatively rigid ceramic substrates for a variety of applications. However, the presence of a solder mask on a polyimide substrate substantially reduces the flexibility of the substrate, which is obviously undesirable. In addition, the relatively high temperatures needed to melt and reflow solder balls distorts polyimide substrates and thereby substantially degrades the dimensional stability of such substrates, which makes subsequent processing of such substrates very difficult, if not impossible. Moreover, these reflow temperatures are so high that polyimide substrates are often on the verge-of decomposing, while other chip carrier substrates, such as epoxy/glass chip carrier substrates, do decompose at these temperatures.
Thus, those engaged in the development of chip packages which include organic chip carrier substrates have sought, thus far with relatively little success, methods for joining chips to organic chip carrier substrates which do not require the use of solder masks, which do not require the melting of solder balls and which do not require the use of fluxing agents.
SUMMARY OF THE INVENTION
The invention involves a method for joining a semiconductor chip in a flip chip configuration, via solder balls, to solderable metal contact pads (i.e., solderable metal contact pads, leads or circuit lines) on the circuitized surface of an organic chip carrier substrate, which method does not require the use of a solder mask, does not require the melting of the bulk of any of the solder balls and does not require the use of a fluxing agent. The invention also involves the, resulting chip package.
Significantly, in accordance with the inventive method, the composition of each of the solder balls, which includes at least a first component, and the composition of the upper portion of each of the solderable metal contact pads on the organic chip carrier substrate, which includes at least a second component, are chosen in relation to each other so as to satisfy a specific requirement. That is, the at least first and second components are chosen in relation to each other so that when brought into proximity with one another and heated, they react to form a relatively low melting point composition (hereinafter denominated RLMPC), such as a eutectic composition, which includes the first and second components. Moreover, the first and second components are chosen so that the RLMPC has a melting temperature which is lower than the melting temperatures of the solder balls and of the contact pads on the organic chip carrier substrate. Consequently, when the solder balls are brought into contact with the contact pads, subjected to sufficient pressure to break any oxide layers covering the solder balls and/or the contact pads, and heated to the melting temperature of the RLMPC associated with the first and second components, a corresponding liquid melt forms at and/or adjacent to the interface between each solder ball (the bulk of which remains unmelted) and the corresponding contact pad (the bulk of which also remains unmelted) on the organic chip carrier substrate. It must be noted that only the relatively thin upper portion of each contact pad is chosen to have a composition which participates in the reaction leading to the formation of the RLMPC. By contrast, the remainder of the contact pad has a different composition which does not participate in the reaction, to preclude dissolution of the bulk of the contact pad, and does not melt at the melting temperature of the RLMPC. Moreover, because the melting temperature of the RLMPC is lower, and typically much lower, than the temperature needed to melt the solder balls, it follows that the organic chip carrier substrate suffers neither deformation nor decomposition. Upon cooling to room temperature, the solidified liquid RLMPC forms a solid bond between each solder ball and the corresponding contact pad. This bond is more than adequate for most purposes, provided the resulting chip package is not subjected to temperatures equal to or greater than the melting temperature of the RLMPC. (However, it must be noted that a solidified RLMPC does tend to dissociate very slowly, at room temperature, over a period of months or years. Therefore, a bond based upon a solidified RLMPC, while adequate for a period of months or years, may not be adequate for longer periods of time.)
In the event the above-described chip package must be subjected to processing temperatures which equal or exceed the melting temperature of the interfacial RLMPC, then either after solidification, or while still liquid, the interfacial RLMPC is subjected to further

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Semiconductor chip package does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Semiconductor chip package, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor chip package will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2512075

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.