Active solid-state devices (e.g. – transistors – solid-state diode – Test or calibration structure
Reexamination Certificate
2000-04-12
2002-09-17
Chaudhuri, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Test or calibration structure
C257S536000, C257S538000, C257S084000, C438S014000, C438S011000
Reexamination Certificate
active
06452208
ABSTRACT:
BACKGROUND OF THE INVENTION
(a) Field of the Invention
The present invention relates to a semiconductor chip including a reference element having reference coordinates and, more particularly, to a semiconductor chip including a reference element used for fixing the coordinates of a failed element in a LSI.
(b) Description of a Related Art
It is desired to accurately fix the location of a particular element or member in a LSI or other devices. In an industry where an accurate fixing of the location is especially desired, there is a technique by which a micron-order location fixing is possible.
JP-A-8(1996)-247790 describes a location fixing technique in a LSI wherein a large number of photodetectors are arranged in an array for fixing the location by detecting and analyzing optical signals. The proposed technique allows accurate location fixing; however, involves disadvantages of higher costs and a larger circuit scale due to the large number of photodetectors (or transistors) integrated therein.
Incorporation of a location fixing function by using a large number of transistors into a semiconductor chip degrades the integration density of the semiconductor device due to the redundant semiconductor elements, which are not used directly for the inherent function of the semiconductor chip itself.
In general, the location fixing function in a semiconductor chip is used after a malfunction of a device element is found therein. In this case, the malfunction of the device element is generally accompanied by light emission or heat generation therefrom, and thus the location of the malfunction is fixed by detecting the location for the light emission or heat generation.
Infrared ray is used for the identification of the failed element, or the location of the light emission or heat generation, wherein the infrared ray is irradiated onto the bottom surface of the semiconductor chip, as shown in FIG.
1
. The image of the pattern including the failed element is then recognized at the bottom surface in the reflected infrared ray, whereby the failed element is identified in the infrared ray by reference to the design pattern.
The infrared ray technique as used above often fails in an accurate location fixing due to an obscure image of the pattern caused by poor resolution. In addition, the infrared ray technique itself cannot be employed depending on the fabrication process used therefor because pattern recognition for identification of the failed element is sometimes impossible. Thus, the infrared ray technique is not always effective in fact for identification of the failed elements.
In an alternative, the light emission or heat generation accompanied by the malfunction of the device element can be recognized by inspection of the bottom surface of the semiconductor chip, as also shown in FIG.
1
. However, since the light emission or heat generation of the failed element is recognized in fact by observing the light passing from the top surface through the bottom surface, there is a possibility that the image of the failed element in the pattern of the light deviates from the real pattern due to refraction of light.
SUMMARY OF THE INVENTION
In view of the above, it is an object of the present invention to provide a semiconductor chip having a location fixing function for a failed element substantially without degrading the integration density and without impairing the function of the internal circuit in the semiconductor chip.
It is another object of the present invention to provide a method for fixing the location of a failed element in a semiconductor chip.
The present invention provides a semiconductor device including a plurality of device elements and a reference element located at a reference position of the semiconductor chip for fixing the location of one of the device elements with respect to the reference element, the reference element emitting light and/or generating heat upon energization thereof.
In accordance with the semiconductor device of the present invention, a failed one of the device elements emitting light and/or generating heat due to the malfunction thereof can be fixed for the location thereof by reference to the reference element while the reference element is energized for light emission and/or heat generation. The failed element and the reference element can be recognized in the semiconductor device due to the light emission and/or heat generation by the failure of the failed element and by the energization of the reference element.
By fixing the reference location of the failed element with respect to the reference element, both of which emit light and/or generate heat, the location of the malfunction can be easily determined by reference to a design pattern. It is preferable that the number of reference elements be two or more, whereby the failed element is fixed for the location thereof with respect to the reference elements in the semiconductor chip.
The reference element in the present invention is not limited in its structure or material so long as the reference element emits light and/or generates heat upon energization thereof. For example, the reference element may be implemented by a polysilicon layer connected at both ends thereof to external terminals through interconnects, or may be implemented by a transistor or a resistor element.
For improvement of the accuracy for fixing the location of the malfunction, the reference element should emit light and/or generate heat at a small area, or substantially at a point specified by a pair of two-dimensional coordinates. If the reference element is implemented by a polysilicon layer, the area for the polysilicon layer is preferably below 1 &mgr;m×1 &mgr;m, and may be around or below 0.4 &mgr;m×0.4 &mgr;m.
The above and other objects, features and advantages of the present invention will be more apparent from the following description, referring to the accompanying drawings.
REFERENCES:
patent: 3808527 (1974-04-01), Thomas
patent: 5619462 (1997-04-01), McClure
patent: 5753391 (1998-05-01), Stone
patent: 5898228 (1999-04-01), Sugasawara
patent: 5999465 (1999-12-01), Shabde
patent: 6108472 (2000-08-01), Rickman
patent: 6124143 (2000-09-01), Sugasawada
patent: 8-247790 (1996-09-01), None
Chaudhuri Olik
Ha Nathan W.
NEC Corporation
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