Semiconductor chip having a low-noise power supply arrangement

Details Semiconductor chip having a low-noise power supply arrangement Semiconductor chip having a low-noise power supply arrangement

1994-08-17

1996-07-09

Nelms, David C.

Static information storage and retrieval

Format or disposition of elements

365 63, 365226, H01L 2710

Patent

active

055351522

ABSTRACT:
A power supply arrangement for a semiconductor chip includes, in a first preferred embodiment, a power supply voltage line, a ground voltage line, an intermediate voltage line, a plurality of first noise reduction capacitors connected between the intermediate voltage line and the power supply voltage line, and a plurality of second noise reduction capacitors connected between the intermediate voltage line and the ground voltage line. In a second preferred embodiment, the power supply arrangement includes a power supply voltage line, a ground voltage line, a quiet power supply voltage line, a quiet ground voltage line, a plurality of first noise reduction capacitors connected between the power supply voltage line and the quiet ground voltage line, and a plurality of second noise reduction capacitors connected between the ground voltage line and the quiet power supply voltage line.

REFERENCES:
patent: 4855613 (1989-08-01), Yamada et al.
patent: 5007025 (1991-04-01), Hwang et al.
patent: 5293334 (1994-03-01), Shimizu

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