Semiconductor chip contact bump structure

Details Semiconductor chip contact bump structure Semiconductor chip contact bump structure

1994-06-30

1995-12-26

Thomas, Laura

Electricity: conductors and insulators

Conduits, cables or conductors

Preformed panel circuit arrangement

174261, 174250, 361760, 361767, H05K 118

Patent

active

054789737

ABSTRACT:
A semiconductor contact bump structure is disclosed in which at least one contact bump is formed on an electrode pad of a semiconductor substrate through a contact window formed in a passivation layer on the semiconductor substrate. The contact bump has different lengths along respective perpendicular directions. In a first direction, the bump covers first edges of the passivation layer which define the contact window, while in a second direction, the contact bump is formed to be fully between second edges of the passivation layer defining the contact window. Such a construction results in a chip bump having an upper surface which is concavely curved along the first direction. By attaching leads to the bump along the second direction, junction resistance is advantageously lowered and noise generation is controlled to improve reliability of a semiconductor package. Also, shorting of the lead is prevented owing to the strong bonding force to improve yield of the semiconductor package.

REFERENCES:
patent: 4341594 (1982-07-01), Carlson et al.
patent: 5134460 (1992-07-01), Brady et al.
patent: 5260518 (1993-11-01), Tanaka et al.
patent: 5293006 (1994-03-01), Yung
patent: 5349500 (1994-09-01), Casson et al.
Tovar, D., Optimization of a Gold Bump Process for Tab by Statistically Designed Experimentation, Itab 1991 Proceedings, 1991 STC.

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