Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
1999-10-27
2002-03-26
Whitehead, Jr., Carl (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S703000
Reexamination Certificate
active
06362521
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to semiconductor ceramics. More particularly, the present invention relates to a semiconductor ceramic having a positive resistance-temperature characteristic, and to a semiconductor ceramic device using the same.
2. Description of the Related Art
Hitherto, a semiconductor device having a positive resistance-thermal characteristic, which abruptly increases resistance above the Curie temperature (hereinafter referred to as a PTC characteristic), is used to protect circuits from overcurrents, and is used as a degaussing part for color TVs. A semiconductor ceramic primarily composed of barium titanate is generally used for the semiconductor device because it has low resistivity and high withstand voltage.
However, the conventional barium titanate type semiconductor ceramic has a problem in that the withstand voltage decreases when the resistivity is further lowered. Therefore, a semiconductor ceramic which has an improved withstand voltage is obtained by substituting Pb and Sr for a part of the Ba in barium titanate, and by incorporating calcium titanate.
A barium titanate type semiconductor ceramic composition having various further improved properties for a positive characteristic thermistor is described in Japanese Unexamined Patent Application Publication No. 3-54165. The composition mentioned above includes 45 to 87 mol percent of BaTiO
3
, 3 to 20 mol percent of PbTiO
3
, 5 to 20 mol percent of SrTiO
3
and 5 to 15 mol percent of CaTiO
3
as primary components, which are individually prepared by a liquid phase process, and additives of 0.2 to 0.5 mol percent of a semiconductor-forming agent, 0.02 to 0.08 mol percent of Mn and 0 to 0.45 mol percent of SiO
2
, on the basis of the primary components. This ceramic composition described above has a resistivity at room temperature of 3 to 10 &OHgr;cm and a withstand voltage of 10 to 200 V/mm. In the above unexamined patent, Sb, Y and La are described as semiconductor-forming agents in the Examples.
In Japanese Unexamined Patent Application Publication No. 3-88770, a barium titanate type semiconductor ceramic composition for a positive characteristic thermistor is described. The composition includes 45 to 85 mol percent of BaTiO
3
, 1 to 20 mol percent of PbTiO
3
, 1 to 20 mol percent of SrTiO and 5 to 20 mol percent of CaTiO
3
as primary components, which are individually prepared by an oxalic acid process, and additives of 0.1 to 0.3 mol percent of a semiconductor-forming agent, 0.006 to 0.025 mol percent of Mn and 0.1 to 1 mol percent of SiO
2
on the basis of the primary components. The ceramic composition has a resistivity at room temperature not greater than 8 &OHgr;cm (4 to 8 &OHgr;cm), a resistance-temperature coefficient &agr;
10-100
not less than 9%/°C. and a withstand voltage not less than 60 V/mm. In the unexamined patent, La, Sb and Nb are described as semiconductor-forming agents in Examples.
However, the semiconductor ceramics disclosed in the patents described above have the following problems.
1. When La, Sb or Nb is used as a semiconductor-forming agent, the variability of resistance becomes larger, although resistivity at room temperature can be lowered.
2. When Y is used as a semiconductor-forming agent, the resistivity at room temperature cannot be lowered.
3. Resistivity at room temperature is greater than 3.5 &OHgr;cm, i.e., resistivity cannot be sufficiently lowered.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a semiconductor ceramic which has a resistivity at room temperature not greater than 3.5 &OHgr;cm, a withstand voltage not less than 50 V/mm, a resistance-temperature coefficient &agr;
10-100
not less than 9%/°C. and a reduced variability of resistance.
It is another object of the present invention to provide a semiconductor ceramic device using the semiconductor ceramic described above, which has a resistivity at room temperature not greater than 3.5 &OHgr;cm, a withstand voltage not less than 50 V/mm, a resistance-temperature coefficient &agr;
10-100
not less than 9%/°C. and a reduced variability of resistance.
To these ends, there is provided in one aspect of the present invention, a semiconductor ceramic including barium titanate, lead titanate, strontium titanate, and calcium titanate as primary components, and samarium oxide as the semiconductor-forming agent, wherein the average diameter of crystalline particles of the semiconductor ceramic is 7 to 12 &mgr;m.
Semiconductor ceramic in accordance with the composition and the average diameter of crystalline particles described above has a resistivity at room temperature not greater than 3.5 &OHgr;cm, a withstand voltage not less than 50 V/mm, a resistance-temperature coefficient &agr;
10-100
not less than 9%/°C. and a reduced variability of resistance.
The semiconductor ceramic composition preferably includes 30 to 97 mol percent of barium titanate, about 1 to 50 mol percent of lead titanate, about 1 to 30 mol percent of strontium titanate and about 1 to 25 mol percent of calcium titanate as primary components, the total of the components being 100 mol percent. In addition, the additives preferably include a Sm-containing compound in an amount of about 0.1 to 0.3 mol elemental Sm, a Mn-containing compound in an amount of about 0.01 to 0.03 mol elemental Mn and a Si-containing compound in an amount of 0 to about 2.0 mol elemental Si, on the basis of 100 mols of the primary components.
The composition of the primary components described above may further lower the resistivity at room temperature.
In another aspect of the present invention, a semiconductor ceramic device has electrodes formed on two main surfaces of the semiconductor ceramic described above.
By the configuration as described above, the semiconductor ceramic device has a resistivity at room temperature not greater than 3.5 &OHgr;cm, a withstand voltage not less than 50 V/mm, a resistance-temperature coefficient &agr;
10-100
not less than 9%/°C. and a reduced variability of resistance.
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patent: 6071842 (2000-06-01), Takahashi et al.
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Database WPI, Section Ch, Week 198305 Derwent Publications Ltd., London GB; Class L03, AN 1983-11451K, XP002138781 & JP 58 001483B (Murata Mfg Co Ltd); Jan. 11 1983; Abstract.
Hirota Toshiharu
Nabika Yasuhiro
Okamoto Tetsukazu
Yamamoto Noriyuki
Brophy Jamie L.
Jr. Carl Whitehead
Ostrolenk Faber Gerb & Soffen, LLP
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