Semiconductor cell with power layout not contacting sides of...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000

Reexamination Certificate

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07747976

ABSTRACT:
A semiconductor cell and a semiconductor circuit utilizing semiconductor cells. The semiconductor cell includes a rectangular boundary and a power layout, where the power layout does not contact any pair of opposite sides of the rectangular boundary. Additionally, the semiconductor circuit includes a plurality of semiconductor cells. Each semiconductor cell includes a rectangular boundary and a power layout, where the power layout does not contact any pair of opposite sides of the rectangular boundary. Because conventional power strips are avoided, the present invention can reduce height of each semiconductor cell, and therefore increase integration of the semiconductor circuit (i.e., the integrated circuit).

REFERENCES:
patent: 4623911 (1986-11-01), Pryor
patent: 6271548 (2001-08-01), Umemoto et al.
patent: 6477696 (2002-11-01), Tien
patent: 6536028 (2003-03-01), Katsioulas et al.
patent: 2006/0289861 (2006-12-01), Correale

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