Semiconductor capacitance device and semiconductor devices...

Details Semiconductor capacitance device and semiconductor devices... Semiconductor capacitance device and semiconductor devices...

1999-05-11

2001-10-16

Meier, Stephen D. (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

C257S296000, C257S532000, C257S299000, C257S313000, C257S386000

Reexamination Certificate

active

06303957

ABSTRACT:

TECHNICAL FIELD
The present invention relates to a semiconductor capacitance device and semiconductor devices such as an analogue integrated circuit using the same. More specifically, the present invention relates to an improvement accomplished with respect to reduction in voltage-dependent capacitance fluctuation.
DESCRIPTION OF THE BACKGROUND ART
As a prior art technique to precisely build a stable capacitive element on a semiconductor substrate, a capacitive element comprising double polysilicon layers
4
and
6
as illustrated in FIG.
25
and its cross-sectional view
FIG. 26
across the A-A′ plane can be mentioned by way of example. As shown in the figures, a dielectric layer
3
is formed on a semiconductor substrate
1
, above that a first doped polysilicon layer
4
, another dielectric layer
5
, and a second polysilicon layer
6
are formed. Note that a well
2
as shown in
FIG. 26
is generally used to shield the capacitive element from electrical noises propagated from the semiconductor substrate
1
. Further, as shown on
FIG. 25
, wiring
7
A and
7
B is connected to the first and second polysilicon layers
4
and
6
via a contact holes
8
A and
8
B, respectively.
However, since electrodes comprising the capacitive element are semiconductors, depletion layers tend to form on the surface of the electrodes based on the voltage applied, resulting in voltage dependent fluctuations in capacitance of the capacitive element. One of the possible methods to alleviate the above performance fluctuation is to raise the impurity concentration of the polysilicon electrode. Yet, because the polysilicon electrodes of the capacitive element are formed concurrently in a MOS fabrication process, increasing the impurity concentration is not readily allowed just for accommodating needs on the side of the capacitive element alone.
Although there is an alternative method such as one disclosed in the Japanese Patent Application Laid-Open No. 6-69522/1994, wherein the impurity concentration of the region near the surface of electrodes contacting the dielectric layer between the electrode layers is increased to a level higher than the other regions, it will complicate the fabrication steps and therefore increase cost.
As described above, double-layered polysilicon capacitive elements of the prior art have the problem of developing a depletion layer inherent to semiconductor electrodes, and a voltage dependency of the capacitance is unavoidable as long as semiconductor electrodes are used. While there are capacitive elements that employ metal layers for both electrodes, such a type makes it difficult to establish reliability and accuracy for the process of the device.
Accordingly, with an aim at eliminating the above-described problems of the prior art, it is an object of the present invention to provide a semiconductor capacitance device with considerably lower voltage dependency of capacitance, which device is made available without significantly altering the conventional fabrication process, and to provide semiconductor devices using the same.
DISCLOSURE OF THE INVENTION
According to one embodiment of the present invention, a semiconductor capacitance device comprises:
a first semiconductor capacitive element having a first voltage dependency factor K
1
;
a second semiconductor capacitive element having a second voltage dependency factor K
2
with a gradient sign inverse of the first voltage dependency factor K
1
; and
wiring layers connecting the first and second capacitive elements either in parallel or in series.
With a configuration such as described above, both the first semiconductor capacitive element and the second semiconductor capacitive element cancel out each other's voltage dependency characteristics to significantly reduce the voltage dependency of the total combined capacitance of the first and second semiconductor capacitive elements connected either in parallel or in series.
When, in the above described configuration, an effective area of the first semiconductor capacitive element is defined as S
1
, and that of the second semiconductor capacitive element as S
2
, and when |K
1
|<|K
2
|, it is preferable to set the relationship of the effective areas to S
1
>S
2
. Such an arrangement lowers the value of, for example, the voltage dependency factor for the total capacitance value in the case of a serial connection, i.e. |K
1
·S
1
/(S
1
+S
2
)+K
2
·S
2
/(S
1
+S
2
)|, thereby significantly reducing the voltage dependency of the total combined capacitance. Moreover, if in the above arrangement the value of the voltage dependency factor is set to be |K
1
·S
1
/(S
1
+S
2
)+K
2
·S
2
/(S
1
+S
2
)|<100 ppm/V, it could bring the voltage dependency of the total combined capacitance to an almost negligible level within the ranges of ordinary operating voltages and capacitance. In particular, if |K
1
·S
1
|≈|K
2
·S
2
| can be attained, then it provides |K
1
·S
1
/(S
1
+S
2
)+K
2
·S
2
/(S
1
+S
2
)|≈0, making the voltage dependency of the total combined capacitance practically negligible.
According to another embodiment, a semiconductor capacitance device of the present invention comprises:
a first capacitive element; and
a second capacitive element connected to the first capacitive element either in parallel or in series, wherein the first capacitive element has a first electrode layer; and
a second electrode layer comprising a semiconductor of a first conduction type and being arranged so that it faces the first electrode layer with an interposed dielectric layer, and
wherein the second capacitive element has a third electrode layer; and
a fourth electrode layer comprising a semiconductor of a second conduction type and being arranged so that it faces the first electrode layer with an interposed dielectric layer.
With a configuration such as described above, the voltage dependency factor of the first capacitive element is determined predominantly by the second electrode layer comprising the semiconductor of the first conduction type, whereas the voltage dependency factor of the second capacitive element is determined predominantly by the fourth electrode layer comprising the semiconductor of the second conduction type, making the gradient signs of the above two voltage dependency factors inverse to each other. Since the above establishes the same type of relationship between the first and second voltage dependency factors K
1
and K
2
as mentioned previously, voltage dependency of the total combined capacitance of the first and second capacitive elements connected either in parallel or in series could be significantly reduced.
In the above described configuration, the first electrode layer of the first capacitive element and the third electrode layer of the second capacitive element can be formed with an identical material in the same fabrication step. Such a method allows a concurrent fabrication of the first electrode layer of the first capacitive element and the third electrode layer of the second capacitive element with either the first or second conduction type.
Moreover, in the above configuration, it is preferable that the impurity concentration of the second electrode layer is set at a concentration lower than that of the first electrode layer, and that the impurity concentration of the fourth electrode layer is set at a concentration lower than that of the third electrode layer. This is because a depletion layer of a semiconductor electrode tends to have a wider spread within an electrode with a lower impurity concentration, which gives significant influence over the voltage dependency of the capacitance value. Accordingly, by using the second and fourth electrode layers comprising semiconductors of different conduction types with lower impurity concentrations, the plus or minus signs for the voltage dependency factors of the capacitance value could be set to differ with each other.
The first electrode

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