Active solid-state devices (e.g. – transistors – solid-state diode – Encapsulated
Reexamination Certificate
2001-01-23
2004-05-11
Flynn, Nathan J. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Encapsulated
C257S724000, C257S730000, C257S788000, C257S789000, C257S793000
Reexamination Certificate
active
06734571
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to a semiconductor die assembly encapsulation mold and to a method of forming an encapsulation mold.
DESCRIPTION OF RELATED ART
Multiple semiconductor dies are often encapsulated together in a single encapsulation mold. Multiple semiconductor dies are secured to a single semiconductor die support structure to form a multiple semiconductor die assembly. The dies are then electrically connected, usually by bondwires, to bond pads of the support structure. The assembly is then placed in an encapsulation mold with a first and a second section that join to form a mold cavity. An encapsulation material is inserted into the mold cavity covering the assembly. The assembly is removed from the mold and the assembly is separated or cut, usually by saw cutting, into individual molded semiconductor dies by cutting through the encapsulation material and the support structure.
FIG. 1
is a top view of a conventional multiple semiconductor die assembly
100
after encapsulation and before the semiconductor dies
30
are separated into individual dies
30
along dashed lines
50
.
FIG. 2
is a cross-sectional view of
FIG. 1
taken at line II—II. The dies
30
are shown secured to the top surface
22
of a semiconductor die support structure
20
such as, for example, a thin printed circuit film or board. There are many well known techniques for securing the dies
30
to the support structure
20
, such as die paste.
FIGS. 1 and 2
illustrate an assembly
100
of six dies
30
mounted on a single support structure
20
. After the semiconductor dies
30
are mounted various electrical connections
31
, such as wire bonds, are made between the dies
30
and the support structure
20
. The dies
30
and the support structure top surface
22
are covered with an encapsulation material to form an encapsulation layer
40
which has a top surface
42
and sidewalls
43
supported by the support structure's top surface
22
. The encapsulation layer can be formed by using an encapsulation mold as described in FIG.
3
.
FIG. 3
illustrates a conventional encapsulation mold
200
for forming the encapsulated assembly
100
of
FIGS. 1 and 2
. The dies
30
secured on a support structure
20
are placed inside the encapsulation mold
200
. A conventional encapsulation mold
200
consists of two sections, a base section
60
and a top section
61
. The base section
60
and top section
61
are secured to each other along a shared perimeter
63
by various means well know in the art. The two sections
60
,
61
, when secured, form a mold cavity
64
. The mold
200
contains an aperture
62
for transferring encapsulation material into the mold cavity
64
. The base section
60
is shown secured against the support structure's bottom surface
21
so that the encapsulation material does not extend past the perimeter
23
of the support structure
20
. The encapsulating material is conventionally injected through the aperture
62
under pressure until the mold cavil
64
is filed. Conventional encapsulating material
40
include various plastics and resins such as various molded epoxy compounds.
After the encapsulation layer
40
is formed, the mold
200
is removed. Various electrical contacts, such as fine ball grid arrays
36
(
FIG. 2
) formed on the support structure's bottom surface
24
, can be formed on the assembly
100
after encapsulation. Dashed lines
50
of
FIGS. 1 and 2
outline the regions where the assembly is cut or singularized into individual packaged dies
30
. A conventional method is to saw cut the assemble
100
along the dashed lines
50
, with the saw entering the assembly
100
from the encapsulation layer's top surface
42
. However one drawback of conventional assembly
100
is that the encapsulating layer
40
often crumples, chips or is otherwise damaged in the separation region
50
during the separation or cutting phase. Uneven or non-uniform surfaces can be created as a result of the separation process.
Another drawback is that the encapsulating layer
40
quickly dulls the cutting blade, so that a thick encapsulation layer
40
slows the singulation process. A third drawback of the conventional method is that the encapsulating layer
40
typically has a different coefficient of thermal expansion than the support structure
20
which may cause the support structure's perimeter
23
to curl up or bow toward the encapsulation layer's top surface
42
. If the support structure
40
bows, it can make the assembly
100
separation process very difficult and result in non-uniform individual die packages
30
. The bowing can also interfere with various electrical contacts formed on the assembly
100
after encapsulation, such as the fine ball grid array
36
shown in FIG.
2
.
Accordingly, it is desirable to provide an encapsulation mold and a method of encapsulating semiconductor assemblies which makes it easier to separate the molded assembly into uniformly shaped individual packaged dies and which reduces the tendency of the assembly's support structure to bow upwards. It is also desirable to improve the uniformity among separated packaged semiconductor dies, reduce the cost and complexity of fabricating packaged semiconductor dies, and reduce damage to the encapsulation layer during die separation.
SUMMARY OF THE INVENTION
The invention addresses some of the drawbacks of conventional semiconductor assembly encapsulation molds as well as problems associated with the encapsulation layer during die separation. A semiconductor assembly including multiple semiconductor dies secured to a single semiconductor support structure are inserted into an encapsulation mold comprising a first mold section and a second mold section. The two sections when secured together form a mold cavity. The second mold section has a design feature which provides an exterior surface molded feature in the molded assembly which facilitates cutting of the encapsulation layer during singulation of the packaged dies. The design feature may be an interconnected continuous groove or interconnected raised rib provided along the interior surface of the mold cavity at die singulation locations.
An encapsulation layer is formed for the assembly using the encapsulation mold with the design feature. Encapsulating material is transferred into the mold until the mold cavity is filled. The encapsulation layer's exterior surface is shaped according to the design feature of the mold. The semiconductor assembly is then removed from the mold and the individual dies are separated from each other by cutting the encapsulation layer and support structure along lines of the encapsulation layer's exterior surface design feature shaped by the interior design feature of the mold.
In one exemplary embodiment, the mold's design feature is a interconnected cavity formed on the interior surface of the mold and projecting out from the main mold cavity. The resulting encapsulation layer's exterior surface has an interconnected raised ribbed along the separation regions of the dies. In another exemplary embodiment, an encapsulation mold has an interior surface of a interconnected projecting rib design feature projecting into the mold cavity. The resulting encapsulation layer's exterior surface has an interconnected grove or cavity along the separation regions of the dies.
These and other advantages and features of the invention will be more clearly understood from the following detailed description of the invention which is provided in connection with the accompanying drawings.
REFERENCES:
patent: 5214846 (1993-06-01), Asami et al.
patent: 6081978 (2000-07-01), Utsumi et al.
patent: 6173490 (2001-01-01), Lee et al.
patent: 6184465 (2001-02-01), Corisis
patent: 6541310 (2003-04-01), Lo et al.
patent: 2002/0014693 (2002-02-01), Pollack
patent: 11-87433 (1999-03-01), None
Dickstein , Shapiro, Morin & Oshinsky, LLP
Flynn Nathan J.
Micro)n Technology, Inc.
Warren Matthew E.
LandOfFree
Semiconductor assembly encapsulation mold does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor assembly encapsulation mold, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor assembly encapsulation mold will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3269046