Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2007-06-19
2007-06-19
Soward, Ida M. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S684000, C257S686000, C257S700000, C257S737000, C257S738000, C257S752000, C257S753000, C257S777000, C257S778000, C257S783000, C257S792000
Reexamination Certificate
active
10850157
ABSTRACT:
The invention relates to a vertical arrangement of at least two semiconductor components which are electrically insulated from one another by at least one passivation layer. The invention likewise relates to a method for fabricating such a semiconductor arrangement. A semiconductor arrangement is specified in which, inter alia, the risk of cracking at the metallization edges, for example, caused by thermomechanical loading, is reduced and the fabrication-dictated high content of radical hydrogen is minimized. Furthermore, a method for fabricating such a semiconductor arrangement is specified.
REFERENCES:
patent: 4947234 (1990-08-01), Einzinger et al.
patent: 5898224 (1999-04-01), Akram
patent: 6256207 (2001-07-01), Horiuchi et al.
patent: 6259155 (2001-07-01), Interrante et al.
patent: 6518662 (2003-02-01), Smith et al.
patent: 6552421 (2003-04-01), Kishimoto et al.
patent: 6630735 (2003-10-01), Carlson et al.
patent: 6717252 (2004-04-01), Saeki
patent: 6784023 (2004-08-01), Ball
patent: 6791168 (2004-09-01), Connell et al.
patent: 6833628 (2004-12-01), Brandenburg et al.
patent: 2002/0017730 (2002-02-01), Tahara et al.
patent: 2002/0076852 (2002-06-01), Paulus et al.
patent: 2002/0158110 (2002-10-01), Caletka et al.
patent: 2003/0017648 (2003-01-01), Pierson
patent: 2003/0102560 (2003-06-01), Kim et al.
patent: 2003/0141529 (2003-07-01), Seto et al.
Bott Nikolaus
Haeberlen Oliver
Kotek Manfred
Larik Joost
Maerz Josef
Dicke, Billig & Czaja P.L.L.C.
Infineon - Technologies AG
Soward Ida M.
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