Optics: measuring and testing – Inspection of flaws or impurities – Surface condition
Reexamination Certificate
2001-04-19
2004-03-02
Nguyen, Tu T. (Department: 2877)
Optics: measuring and testing
Inspection of flaws or impurities
Surface condition
Reexamination Certificate
active
06700659
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to semiconductor device analysis and, more particularly, to devices and arrangements for enhancing the operability of semiconductor analysis.
BACKGROUND OF THE INVENTION
The semiconductor industry has recently experienced technological advances that have permitted dramatic increases in circuit density and complexity, and equally dramatic decreases in power consumption and package sizes. Present semiconductor technology now permits single-chip microprocessors with many millions of transistors, operating at speeds of hundreds of millions of instructions per second to be packaged in relatively small, air-cooled semiconductor device packages. A by-product of these technological advances has been an increase in the complexity of manufacturing of the devices, which has been accompanied by increased pressure to produce consistent and affordable products.
As the manufacturing processes for semiconductor devices and integrated circuits increase in difficulty, methods for testing and debugging these devices become increasingly important. Not only is it important to ensure that individual chips are functional, it is also important to ensure that batches of chips perform consistently. In addition, the ability to detect a defective manufacturing process early is helpful for reducing the number of defective devices manufactured.
One type of semiconductor analysis involves conveniently directing perturbation signals, such as laser light, to a semiconductor device under test (DUT). When performing such analysis, however, there are many issues to be managed. These issues include concerns such as laser leakage, calibration problems, and functional deficiencies. Further, there is a need for convenient approaches to presenting various types of perturbation signals to the DUT and to manage the DUT's response effectively and efficiently while maintaining an operable testing process.
SUMMARY OF THE INVENTION
The present invention is directed to an approach for improving semiconductor analysis. The present invention is exemplified in a number of implementations and applications, some of which are summarized below.
The present invention is directed to addressing needs discussed above and is further useful in connection with the example embodiments disclosed in the above-referenced patent documents. According to an example embodiment of the present invention a system is adapted to analyze a semiconductor die using detected light leakage from the system. A light source is coupled a semiconductor analysis arrangement that holds a semiconductor die and uses light from the light source for analyzing the die. The light source is coupled to the analysis arrangement using, for example, a fiber optic cable that directs light from the light source to the analysis arrangement. At least one light detection arrangement is adapted to detect whether light leaks from the fiber optic cable. The light detection arrangement may include, for example, a photodiode, a heat sensor and/or a die response detector. If a response is received from the light detection arrangement that is indicative of light leaking, the light source is deactivated. In this manner, light leakage can be detected and used to stop the light source to prevent further leakage during die analysis.
According to another example embodiment of the present invention, a system for analyzing a semiconductor die includes an arrangement adapted to detect light leakage. The system includes a test head adapted to hold the die and to provide an interface between the die and a chamber used to analyze the die. Once the test head is coupled with the chamber, one or more perturbation devices, such as laser, e-beam and ion beam devices, are used to analyze the die. Operation control data, such as chamber condition, die response, light leakage and other data, are provided to a processor programmed to evaluate the data relative to similar data obtained for a nondefective die undergoing the same types of tests and under similar conditions. The processor is further coupled to the test head and adapted to receive response data from the die, such as electrical data obtained from die outputs. The perturbation devices are also optionally coupled to the processor, and the processor can be adapted to control and receive feedback from the devices. A monitor is adapted to display information such as response data and control data. In one particular implementation, the monitor is used as part of an interface for controlling the system.
The above summary of the present invention is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and detailed description which follow more particularly exemplify these embodiments.
REFERENCES:
patent: 5759424 (1998-06-01), Imatake et al.
patent: 6395563 (2002-05-01), Eriguchi
Bruce Michael
Bruce Victoria
Chunduri Srikar V.
Davis Brennan V.
Eppes David H.
Advanced Micro Devices , Inc.
Nguyen Tu T.
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