Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2005-10-20
2008-09-02
Trimmings, John P (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S030000, C714S702000, C714S720000, C714S728000, C714S733000, C714S734000, C714S738000, C714S739000, C714S742000, C714S743000, C711S100000, C711S200000, C365S201000
Reexamination Certificate
active
07421629
ABSTRACT:
The invention relates to a semi-conductor component test procedure, and a semiconductor component test device (10b), which comprise:a device (43) for generating pseudo-random address values to be applied to corresponding address inputs of a semi-conductor component (2b), in particular a memory component, to be tested.
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Bucksch Thorsten
Meier Martin
Infineon - Technologies AG
Slater & Matsil L.L.P.
Trimmings John P
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