Semantic processor systems and methods

Details Semantic processor systems and methods Semantic processor systems and methods

2007-02-15

2010-02-16

Coleman, Eric (Department: 2183)

Electrical computers and digital processing systems: processing

Processing control

C712S029000

Reexamination Certificate

active

07664938

ABSTRACT:
A system including a CPU including logic for executing code from a location and at a time determined by an external entity, a data cache and a CPU management entity (CME) including logic for receiving data one unit at a time from an external data feeder. The data unit being arbitrarily defined mutually between the data feeder and the CME. The CME being coupled to the CPU. The CME including logic to provide the received data unit, a corresponding context information and a corresponding code address to the CPU, wherein the CPU includes logic for notifying the CME of a completed execution.

REFERENCES:
patent: 6061744 (2000-05-01), Mathur
patent: 6334153 (2001-12-01), Boucher et al.
patent: 2005/0138622 (2005-06-01), McAlpine et al.
patent: 2005/0273792 (2005-12-01), Inohara et al.
patent: 2007/0025351 (2007-02-01), Cohen

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