Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2009-03-25
2011-12-20
Verbrugge, Kevin (Department: 2189)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
C711SE12001, C713S400000
Reexamination Certificate
active
08082401
ABSTRACT:
Multi-ported memory systems (e.g., register files) employ self-timing for operational synchronization. Thus, rather than using a reference clock duty cycle for operational synchronization, as in conventional multi-ported register files, embodiments of the present disclosure employ self-timing for such operational synchronization. According to certain embodiments, self-timing is employed to synchronize all the internal events within the memory so that all the events are spaced in time for appropriate synchronization. For instance, the completion of one event leads to triggering another event, the completion of which leads to triggering another event, and so on. Thus, in one embodiment, the self-timing is achieved by referencing the operational events with the memory (or register file) to each other, rather than to a reference clock duty cycle.
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Chen Nan
Jung Chang Ho
Rao Hari
Yoon Sei Seung
Gallardo Michelle
QUALCOMM Incorporated
Talpalatsky Sam
Velasco Jonathan T.
Verbrugge Kevin
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