Self-timed control circuit for self-resetting logic circuitry

Details Self-timed control circuit for self-resetting logic circuitry Self-timed control circuit for self-resetting logic circuitry

1995-08-21

1996-10-15

Westin, Edward P.

Electronic digital logic circuitry

Clocking or synchronizing of logic stages or gates

326 17, 326 21, 326 40, H03K 1900

Patent

active

055657982

ABSTRACT:
A self-timed control circuit for self-resetting CMOS logic circuitry provides handshaking between macros to ensure that all data inputted to a particular macro is maintained by the source macros until all data inputs have been received. A data output signal from a macro is maintained until the macro receives a complete signal from all receiving macros indicating that the receiving macros have received all data inputs supplied to them.

REFERENCES:
patent: 4717912 (1988-01-01), Harvey
patent: 4985643 (1991-01-01), Proebsting
patent: 5329176 (1994-07-01), Miller, Jr.
patent: 5373204 (1994-12-01), Muramatsu
patent: 5434519 (1995-07-01), Trinh et al.
patent: 5450020 (1995-09-01), Jones
patent: 5493239 (1996-02-01), Zlotnick
United States Patent Application Serial No. 08/450,056.
United States Patent Application Serial No. 08/461,961.

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