Self-timed control circuit for self-resetting logic circuitry

Electronic digital logic circuitry – Clocking or synchronizing of logic stages or gates

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Details

326 21, 326 98, H03K 1900

Patent

active

057083746

ABSTRACT:
A self-timed control circuit for self-resetting CMOS logic circuitry provides handshaking between macros to ensure that all data inputted to a particular macro is maintained by the source macros until all data inputs have been received. A data output signal from a macro is maintained until the macro receives a complete signal from all receiving macros indicating that the receiving macros have received all data inputs supplied to them.

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