Self-timed comparison circuits and systems

Details Self-timed comparison circuits and systems Self-timed comparison circuits and systems

1997-04-30

1999-05-18

Nelms, David

Static information storage and retrieval

Read/write circuit

Including signal comparison

365194, G11C7/00

Patent

active

059056800

ABSTRACT:
In one embodiment there is a comparison circuit (28) for selecting data in response to a first binary quantity (ADDRESS) and a second binary quantity (TAG). The comparison circuit includes a match circuit (34) for outputting a match signal (MATCH) in response to comparing the first binary quantity and the second binary quantity. The comparison circuit also includes a delay circuit (36) for outputting a delay signal (TC.sub.D) in response to a signal generated at a same time as the second binary quantity, and circuitry (38) for outputting a hit signal in response to the match signal and the delay signal. The hit signal indicates that a memory stores data corresponding to the second binary quantity. Still further, the comparison circuit includes dynamic select circuit (40) for outputting a logic state of data corresponding to the first binary quantity and in response to the hit signal. The dynamic select circuit comprises a precharge node (88) and at least one transistor (90) coupled in a discharge path coupled to the precharge node. The at least one transistor is operable to conduct in response to the hit signal reaching a discharge enable voltage such that the precharge node is discharged and the logic state of the data changes in response thereto. The hit signal has various attributes. First, the hit signal is initially at a disable level insufficient to discharge the precharge node of the select circuit. Second, the hit signal transitions from the disable level to the discharge enable voltage in response to the memory storing data corresponding to the second binary quantity. Third, a transition of the delay signal occurs at a time with respect to a transition of the match signal such that the hit signal does not reach the discharge enable voltage of the dynamic select circuit in response to the memory not storing data corresponding to the second binary quantity.

REFERENCES:
patent: 5479641 (1995-12-01), Nadir et al.
patent: 5526503 (1996-06-01), Kim
patent: 5528541 (1996-06-01), Ghia et al.
patent: 5577223 (1996-11-01), Tanoi et al.
patent: 5661694 (1997-08-01), Fukutani et al.

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