Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Reexamination Certificate
2005-09-20
2005-09-20
Baker, Stephen M. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital data error correction
C710S052000, C710S060000
Reexamination Certificate
active
06948113
ABSTRACT:
A method and apparatus for an error-correction buffer having self-throttling data burst control in a disc drive. One aspect of the present invention provides an arbitration-throttling control circuit for use in a disc drive to self-throttle the data transfer of an error-correction buffer. The arbitration-throttling control circuit includes a control circuit having an error-correction buffer interface and a disc-drive main buffer memory interface for controlling data transfer from the error-correction buffer to a disc-drive main buffer in a plurality of data bursts. The control circuit arbitrates for access to transfer data into the disc-drive main buffer such that a series of data bursts from the error-correction buffer to the disc-drive main buffer are spread substantially evenly over a period of time.
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Baker Stephen M.
Berger Derek J.
Lucente David K.
Seagate Technology LLC
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