Self-test circuit for memory integrated circuits

Static information storage and retrieval – Read/write circuit – Testing

Patent

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

365190, 365202, 365149, 36518907, 371 212, 371 213, G11C 2900

Patent

active

059826827

ABSTRACT:
A sense amplifier senses and stores data from a memory cell in an array of memory cells arranged in rows and columns. The sense amplifier includes a sense circuit having a pair of first and second complementary digit lines which senses a voltage differential between the first and second complementary digit lines and in response to the sensed voltage differential drives the first and second complementary digit lines to voltage levels corresponding to complementary logic states. An isolation circuit is coupled between the pair of first and second complementary digit lines of the sense amplifier and a pair of first and second complementary digit lines associated with a column of memory cells. The isolation circuit is operable to couple the first complementary digit line of the sense amplifier to the first complementary digit line of the column of memory cells and the second complementary digit line of the sense amplifier to the secondary complementary digit line of the column of memory cells. A switch circuit is operable to couple the first complementary digit line of the sense amplifier to the second complementary digit line of the column of memory cells, and the second complementary digit line of the sense amplifier to the first complementary digit line of the column of memory cells. An equilibration circuit is coupled between the pair of complementary digit lines of the column of memory cells and is operable to equalize the voltage level on the digit lines to a predetermined level.

REFERENCES:
patent: 5140553 (1992-08-01), Choi et al.
patent: 5285419 (1994-02-01), Iyengar
patent: 5381368 (1995-01-01), Morgan et al.
patent: 5440517 (1995-08-01), Morgan et al.
patent: 5555212 (1996-09-01), Toshiaki et al.
patent: 5684809 (1997-11-01), Stave et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Self-test circuit for memory integrated circuits does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Self-test circuit for memory integrated circuits, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Self-test circuit for memory integrated circuits will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-1465313

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.