Self synchronous scrambler apparatus and method for use in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction

Reexamination Certificate

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Details

C370S480000

Reexamination Certificate

active

06820230

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to data communications, and more particularly, to methods and apparatuses for enabling dense wavelength division multiplexing (DWDM) network equipment to transport data independent of bit-stream characteristics and line coding of the data.
2. Description of Related Art
Optical networking is fast becoming the solution to provisioning future telecommunication systems with the required bandwidth for a wide variety of applications such as Internet services, video-on-demand and video conferencing. This commercial demand for higher aggregate data rates has led to rapid deployment of new communications technology and DWDM has emerged as a next step in this evolutionary process of high-speed networking.
DWDM network deployment has been made practical by several new technologies including optical signal multiplexers, optical signal demultiplexers, and optical amplifiers. As implemented on a DWDM network terminal, optical signal multiplexers accept multiple optical signals transmitted on different wavelengths (i.e., channels) of light over separate fibers and combine those signals onto a single fiber. DWDM network optical signal demultiplexers accept multiple optical signals carried on different wavelengths of light over a single fiber and separate the multiple signals onto separate fibers. Optical amplifiers boost the power levels of the multiplexed channels simultaneously, extending the transmission range of DWDM terminals to a practical and useful distance.
Wavelength division multiplexing (WDM) and DWDM enable an orthogonal set of carriers to be separated, routed, and switched without interfering with each other. Implementation of WDM and DWDM networks may require a variety of passive and/or active devices to combine, distribute, isolate, and amplify optical power at different wavelengths.
FIG. 1
shows the use of such components in a typical WDM link. At the transmitting end, there are several independently modulated light sources
102
, each emitting signals at a unique wavelength. A multiplexer
104
combines these optical outputs into a serial spectrum of closely spaced wavelength signals and couples them onto a single fiber
108
. At the receiving end, a demultiplexer
112
separates the optical signals into appropriate detection channels for signal processing.
DWDM terminals interface with most high-speed communications terminals via Optical Line Input-Output units (OLIU). The optical input unit of a DWDM terminal accepts an incoming single channel optical data stream, converts the incoming optical data stream to an electrical binary data stream, retransmits the binary data stream as an optical signal at a specific wavelength suitable for optical multiplexing, and presents the optical signal to the multiplexer. The optical output unit of the DWDM terminal performs a reverse operation as that of the optical input unit the DWDM terminal. That is, the optical output unit accepts an individual wavelength from the multiplexed optical stream, converts the multiplexed signal to an electrical binary data stream, and converts the electrical stream to an optical signal suitable for reception by a single channel network terminal.
Optical amplifiers play an important role in the deployment and proper operation of DWDM networks. In general, the gain applied to an individual optical channel is proportional to its signal strength. Optical amplifiers used for DWDM network applications employ channel monitoring and active gain flattening hardware to equalize channel signal strengths. The reaction time, however, of this hardware is lengthy compared to the time it takes to transmit individual bits of information over the DWDM channel.
In one approach, line coding schemes are designed to provide a DC-balanced signal level such as Code Mark Inversion (CMI), and 8-bit/10-bit Partitioned Block Transmission Code to provide channel equalization on a DWDM network for arbitrary bit patterns. These codes, however, were devised for single-channel (non-DWDM) transmission systems to accomplish clock-recovery at a receiver unit of the encoded bit-stream, and to produce a balanced signal on the transmission line for proper operation with electrical components such as, for example, capacitors and electronic amplifiers.
The Partitioned Block transmission code approach requires a greater amount of overhead for transmitting arbitrary bit streams. It further includes error multiplication characteristics that are difficult to overcome using bit-error detection and correction code approaches.
Another approach involving a CMI code is disfavored in view of modern transmission protocols as it requires a 100 percent overhead. In this approach, two bits are output from the CMI encoder for every input bit. For example, a binary “0” is encoded as a binary sequence “01”, and a binary “1” is encoded alternately as a binary sequence “00” or “11”. Further, the binary sequence “10” is not allowed as it is used by the CMI framer to locate frame synchronization. Thus, a single bit error on the encoded bit-stream will cause either a single bit-error, or a disallowed state on the decoder. This latter event could cause a burst error as the receiver recovers its state.
Yet another approach involves a 8-bit/10-bit partitioned block transmission code that accepts 8-bit “bytes” of input data and encodes it as a 10-bit “symbol” for output. With respect to optical networks, the 10-bit symbol is encoded on the line using non-return-to-zero (NRZ) two-level optical pulses. Symbols are chosen so as to “even-out” the occurrence of “1”s and “0”s. There are no more than seven and no less than three “1”s in any 10-bit symbol. Additionally, there are two possible binary-complementary 10-bit symbols that are used to represent every 8-bit input byte. A flag bit is used to maintain count of the number of “1”s and “0”s that have been transmitted, and also to select which of the two possible symbols are used to represent an 8-bit byte. As 10-bits are required to encode each 8-bit input value, this coding scheme has about a 25% overhead. Bit errors which occur within the 10-bit symbol can produce an 8-bit burst error on decoding. Although error detection and correction schemes may be devised to correct errors induced by the 8-bit/10-bit coding scheme, such schemes are not employed in 8-bit/10-bit transmission hardware in view of the level of complexity and overhead involved therein.
Currently available DWDM equipment is subject to failure caused by power levels of the multiplexed channels being out of equalization. This condition may arises when the number of “1”s and “0”s present in a line encoded bit-pattern are disproportionate over time intervals on the order of a millisecond. Data transmission protocols currently in use do not preclude this condition. There is, however, no approach that is currently available for encoding and decoding arbitrary bit-streams onto a DWDM network. The present invention proposes a solution to overcome the problems of prior approaches.
SUMMARY OF THE INVENTION
A method and apparatus for use in DWDM network equipment for transporting data independent of bit-stream characteristics and line coding is proposed. In a preferred exemplary embodiment, a self-synchronous scrambler is used for transforming an arbitrary bit-stream into a bit-stream suitable for input to a DWDM network, and for reconstituting the original bit-stream from the transformed bit-stream. The self-synchronous scrambler equalizes the number of “1”s and “0”s in an input bit-pattern over time periods of a few bit-clock periods, thus making it suitable for transport over a DWDM channel and providing for the recovery of the original bit-pattern from the scrambled pattern.
The optical input unit of the self-synchronous scrambler applies error correcting codes to correct for error multiplication in the process of equalizing the number of “1”s and “0”s in the input bit-pattern. In one embodiment, the size of the frame to transport input bits is fixed. In another embodiment, the size of

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