Self-synchronizing method and apparatus for exiting dynamic rand

Details Self-synchronizing method and apparatus for exiting dynamic rand Self-synchronizing method and apparatus for exiting dynamic rand

1998-10-06

2000-08-29

Auve, Glenn A.

Electrical computers and digital processing systems: support

Computer power control

Power conservation

365226, G06F 132

Patent

active

061123064

ABSTRACT:
A self-synchronizing method and apparatus for exiting a dynamic random access memory from a low power state is provided. The exit from the low power state is initiated. After the expiration of an exit delay period, a first quiet time is sent on a column-access pin. A second quiet time is sent on a row-access pins to reset the memory. The first quiet time and the second quiet time are not necessarily concurrent.

REFERENCES:
patent: 5319601 (1994-06-01), Kawata et al.
patent: 5781782 (1998-07-01), Tachikawa
patent: 5828619 (1998-10-01), Hirano et al.

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